Excavating
Patent
1990-09-17
1992-07-14
Smith, Jerry
Excavating
371 3, 371 23, G01R 3128
Patent
active
051309882
ABSTRACT:
An integrated circuit having boundary-scan facilities in accordance with IEEE Standard 1149.1, has its boundary scan chain configured to permit fault insertion testing of diagnostic and maintenance software. Each Scan cell includes storage devices for storing a pair of bits of a binary vector shifted into the boundary scan chain. One bit comprises faulty data and the other bit serves to control application of the faulty data by the scan cell. A system incorporating such integrated circuits includes a controller for controlling the IEEE test interface to shift the binary vector into the boundary scan chain, and diagnostic and maintenance software for diagnosing the faults introduced into the integrated circuits.
REFERENCES:
patent: 4669081 (1987-05-01), Mathewes, Jr. et al.
patent: 4875209 (1989-10-01), Mathewes, Jr. et al.
IBM Technical Disclosure Bulletin vol. 31, No. 1, Jun. 1988, New York US pp. 127-128; `Verification of error correction circuitry` see p. 128 line 8-131; figure.
"Bounday Scan A Framework For Structured Design-For-Test" by Colin Maunder and Frans Beenker, IEEE 1987 International Test Conference, Paper 30.1, pp. 714-723.
"Boundary Scan And Its Application To Analog-Digital ASIC Testing In A Board/System Environment" by Patrick P. Fasang, IEEE 1989 Custom Integrated Circuits COnference, 22.4.1-22.4.3.
Hjartarson Gudmundur A.
Hum Robert A.
Wilcox Philip S.
Adams Thomas
Lebowitz Henry C.
Northern Telecom Limited
Smith Jerry
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