Software model for a hybrid stacked field programmable gate...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing

Reexamination Certificate

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C716S100000

Reexamination Certificate

active

07930661

ABSTRACT:
A software model (620) of a stacked integrated circuit system (600) includes a first integrated circuit die (602) connected to a second integrated circuit die (604) through an interchip communication interface (606). A software model of the first integrated circuit die includes an integrated circuit resource (614) and an internal interface (150). A software model of the second integrated circuit die includes a stacked resource (618). The software model of the internal interface is configurable to connect the stacked resource of the second integrated circuit die to the integrated circuit resource through the interchip communication interface.

REFERENCES:
patent: 6178494 (2001-01-01), Casselman
patent: 6614267 (2003-09-01), Taguchi
patent: 6875921 (2005-04-01), Conn
patent: 7233061 (2007-06-01), Conn
patent: 7543283 (2009-06-01), Luk et al.
patent: 7619441 (2009-11-01), Rahman et al.
patent: 7727896 (2010-06-01), Rahman
patent: 2002/0066956 (2002-06-01), Taguchi
U.S. Appl. No. 11/973,062, filed Oct. 4, 2007, Rahman et al.

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