Patent
1996-03-18
1999-05-04
Harrell, Robert B.
395392, G06F 900
Patent
active
059013087
ABSTRACT:
A method of compiling an application to reduce the occurrence of speculative exceptions is described. The method includes the steps of compiling the application to provide a speculation table and an executable file, and obtaining profile information about said compiled application using representative data sets. The compiler includes a scheduler unit for rearranging the order of the instructions in the application to provide optimal performance. The speculation table comprises a number of entries corresponding to the instructions of the application, each entry including a tag identifying the instruction and a semaphore indicating whether or not the instruction is likely to cause an exception. The executable file is run using a number of representative data sets to profile information identifying those instructions that result in exceptions, and the tag of the instruction is stored in a log file. After the profiling has completed, the tags of the instructions causing exceptions are used to set the semaphores in the speculation table corresponding to the tag. The application is then re-compiled. During the recompilation, those instructions with their semaphores set; i.e. those instructions causing exceptions, will not be speculatively scheduled by the compiler.
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Thomas M. Conte et al, "Using Branch Handling Hardware to Support Profile-Driven Optimization", Dec. 1994.
Thomas M. Conte, Burzin A. Patel, and J. Stan Cox--"Using Branch Handling Hardware to Support Profile-Driven Optimization", Dec. 1994.
Adler Michael C.
Cohn Robert
Lowney Paul Geoffrey
Digital Equipment Corporation
Harrell Robert B.
Ovedovitz David M.
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