Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Software program
Reexamination Certificate
2006-12-19
2006-12-19
Ferris, Fred (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Software program
C703S013000, C703S021000, C703S026000, C717S135000, C717S138000, C717S131000
Reexamination Certificate
active
07152028
ABSTRACT:
This invention is a method of complex cache memory analysis and synthesis. This invention proceeds in the normal fashion of writing a program and simulating it, but makes use of a closed loop design approach to completing the analysis-synthesis process. A program behavior analysis tool PBAT is integrated as part of an otherwise conventional program development tool. The PBAT offers a single environment where code development, simulator trace capture, and cache analysis take place. The cache analysis tool of PBAT is designed to match the current cache design of the processor and to identify any weakness in the current design or special features that need to be added. Code adjustments are passed back to the assembler and linker and in successive simulations using the integrated PBAT tool resulting in code that better fits a specific cache design.
REFERENCES:
patent: 5987250 (1999-11-01), Subrahmanyam
patent: 6002875 (1999-12-01), Stolberg
patent: 6226790 (2001-05-01), Wolf et al.
patent: 6507809 (2003-01-01), Yoshino et al.
patent: 6668312 (2003-12-01), Aubury
patent: 6691080 (2004-02-01), Tachibana
patent: 6704925 (2004-03-01), Bugnion
patent: 7010722 (2006-03-01), Jahnke
patent: 2003/0009746 (2003-01-01), Krishnan
patent: 2003/0117971 (2003-06-01), Aubury
“Automatic and Efficient Evaluation of Memory Hierarchies for Embedded Systems”, S. Abraham et al, Hewlett-Packard # HPL-1999-132, Oct. 1999.
“Retargetable Cache Simulation Using High Level Processor Models”, Ravindran et al, IEEE 0-7695-0954-1/01, IEEE Jan. 2001.
“A Cache Visualization Tool”, van de Deijl et al, IEEE 0018-9162/97, IEEE Jul. 1997.
Brady W. James
Ferris Fred
Marshall, Jr. Robert D.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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