Soft-error rate improvement in a latch

Details Soft-error rate improvement in a latch Soft-error rate improvement in a latch

2006-06-27

2006-06-27

Nguyen, Long (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

C327S210000, C327S211000

Reexamination Certificate

active

07068088

ABSTRACT:
In a preferred embodiment, the invention provides a circuit and method for reducing soft error events in latches. The input of a first inverter is connected to the output of a second inverter. The input of a second inverter is connected to the output of the first inverter. When the input to the first inverter is disturbed by a soft error event, a signal tristates the first inverter.

REFERENCES:
patent: 5467038 (1995-11-01), Motley et al.
patent: 5559461 (1996-09-01), Yamashina et al.
patent: 6211713 (2001-04-01), Uhlmann
patent: 6621318 (2003-09-01), Burr
patent: 2001/0028269 (2001-10-01), Shuler, Jr.

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