Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1997-01-15
1999-07-06
Dang, Trung
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438424, 438443, 148DIG50, H01L 2176
Patent
active
059207876
ABSTRACT:
A semiconductor device isolating structure and method for forming such a structure. In one embodiment, the semiconductor device isolating structure of the present invention includes a trench formed into a semiconductor substrate. A cross-section of the trench has a first sidewall extending to the bottom surface of the trench, and a second sidewall extending to the bottom surface of the trench. Furthermore, the trench of the present invention also has a first field oxide region formed proximate to the interface of the first sidewall and the top surface of the semiconductor substrate, and a second field oxide region formed proximate to the interface of the second sidewall and the top surface of the semiconductor substrate. As a result, the semiconductor substrate has a first rounded corner formed at the intersection of the top surface of semiconductor substrate and the first sidewall, and a second rounded corner formed at the intersection of the top surface of the semiconductor substrate and the second sidewall. In so doing, the present invention eliminates the sharp upper corners found in conventional trenches formed using prior art shallow trench isolation methods.
REFERENCES:
patent: 4679304 (1987-07-01), Bois
patent: 4835115 (1989-05-01), Eklund
patent: 5106777 (1992-04-01), Rodder
patent: 5468676 (1995-11-01), Madan
patent: 5731221 (1998-03-01), Kwon
Haskell Jake
Laparra Olivier
Zheng Jie
Dang Trung
VLSI Technology Inc.
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