Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2003-04-30
2004-08-03
Zarneke, David A. (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
Reexamination Certificate
active
06771085
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to methods for testing integrated circuits, and more particularly to a system for performing qualification tests on integrated cicuit packages that eliminates the need for stress sockets and device specific custom boards.
BACKGROUND OF THE INVENTION
Integrated circuits are typically packaged before they are used with other components as part of a larger electronic system. Ball grid array (BGA) packages, for example, are constructed with die mounted on a substrate, and an array of solder balls mounted on the bottom of the substrate are used to attach the package to a PC board or motherboard. In contrast, leaded plastic packages use lead frames on the outer edges of the package substrate to attach the package to the PC board.
In order to test the reliability of the integrated circuit packages, the packages are subjected to qualification tests. The most critical and expensive test is to put the packages under bias, moisture, and high-temperature conditions, which is referred to as a Bias/Humidity/Temperature (BHT) test, including some highly accelerated versions known as (HAST).
To perform a HAST test, the packages must be placed into a separate device, called a stress socket, that makes an external electrical connection with the package. For purpose of example, these connections will be described in terms of BGAs. The stress socket also includes a lid that clamps down on the BGA package to apply pressure. The stress sockets containing the packages are then attached to a board, and the board is then placed into a HAST chamber for testing. After HAST testing, the packages are removed from the stress sockets and then placed into another test apparatus for automated electrical testing (ATE). The ATE tester requires the use of a different socket for forming an electrical connection with the packages.
Although the method described above for performing HAST testing works for its intended purpose, the method has several disadvantages. First, stress sockets are expensive because they must be custom made. Integrated circuit packages come in a variety of shapes and sizes. For example, a BGA package may have anywhere from 200 to 3000 balls. Therefore, custom stress sockets must be designed and manufactured for each type of package to be tested, which is both time-consuming and expensive. Further adding to the cost of stress sockets is the materials required to build the sockets. The sockets must be made to withstand the test atmosphere, which is a very harsh condition varying up to 130° C. and 2.2 atmosphere of H2O pressure. Consequently, the sockets tend to be large and thick, adding to the cost of the materials.
Another disadvantage is that because the sockets are custom designed, so must the boards that the sockets attach to. Custom designed boards can also be expensive, especially since the boards must also be able to withstand the harsh test conditions. In addition, a minimum of 45 packages are needed for testing, which requires a significant number of boards to mount the sockets.
A further disadvantage is that due to the relatively large size of the sockets, the number of sockets that can be mounted on one board is limited, which limits the number of packages that can be placed into the HAST chamber at any one time. Finally, for interim leakage test times, it is also time consuming to remove the packages from the sockets on the board and reconnect them to sockets on the ATE tester. Requiring that the packages be attached from one testing device, removed, and reattached to another testing device is inefficient and time-consuming.
As an example of the cost and time required by the above method, consider the situation where a 50 mm 2397 BGA needs to be qualification tested using conventional sockets and boards. In today's dollars, the cost of designing and manufacturing the required number of board-mounted sockets (45) is approximately $250,000, and a 16-17 week lead-time is required for the design, production, and assembly. Adding to this cost is the fact that the boards require frequent routine maintenance, which is also costly and time consuming. Such costs are becoming prohibitive as integrated circuit packages become larger in size.
Accordingly, what is needed is an improved method and system for performing qualification test on integrated circuit packages.
SUMMARY OF THE INVENTION
The present invention provides an interposer card for mounting integrated circuit packages that eliminates the need for sockets and custom boards during qualification tests. The interposer card includes pads for mounting the I/Os of a test package; edge card connectors for connecting the interposer card directly to a test board and for performing bias testing on the test package; and pads for replicating the test package I/Os for connecting the interposer card to an automated electrical testing (ATE) system for performing ATE tests on the test package.
A further aspect of the present invention provides a universal stress board (USB) containing multiple pairs of adjustable mating female connectors for mounting the interposer cards via the edge card connectors. Because the connectors are adjustable, the USB can accommodate different sizes of interposer cards, eliminating the need for custom boards. In addition, the interposer cards can be mounted on both sides of the USB, thereby increasing a number of interposer cards that can be placed into a HAST chamber.
According to the system and method disclosed herein, the interposer card and universal stress board, eliminates both sockets and boards for B/H/T stress testing and enables both edge card and BGA connections to be made in the same design. The cost of designing and manufacturing the interposer card is a small fraction of the conventional method and the savings will increase as future larger pin count packages are tested. The design of the interposer card also decreases lead-time (4-5 weeks), and virtually eliminates board/socket maintenance and storage.
REFERENCES:
patent: 4821146 (1989-04-01), Behrens et al.
patent: 5929646 (1999-07-01), Patel et al.
patent: 6597189 (2003-07-01), Grilletto
Nguyen Trung Q.
Sawyer Law Group LLP
Zarneke David A.
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