Socket used for semiconductor device and testing system...

Details Socket used for semiconductor device and testing system... Socket used for semiconductor device and testing system...

2001-03-22

2002-10-08

Sherry, Michael (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C439S071000

Reexamination Certificate

active

06462572

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to a socket used for a semiconductor device and a testing apparatus equipped with the socket and, more particularly, to a socket appropriate to a ball- grid- array package for a semiconductor device and a testing apparatus equipped with the socket connected to a testing circuit through dual-transmission lines.
DESCRIPTION OF THE RELATED ART
FIG. 1
illustrates a typical example of the testing system used for semiconductor devices, and the equivalent circuit thereof is shown in FIG.
2
. The prior art testing system largely comprises a testing apparatus
20
, a socket and a printed wiring board
45
. The printed wiring board
45
is provided between the testing apparatus
20
and the socket
40
, and a semiconductor device
50
is connected to the socket
40
.
The testing apparatus
20
includes a coaxial cable containing a plurality of signal lines
30
and a testing circuit
31
. The testing circuit includes a plurality of drivers D
1
, D
2
. . . and Dn and a plurality of receivers R
1
, R
2
, . . . and Rn.
The signal lines
30
arc broken down into two groups. The drivers D
1
, D
2
, . . . and Dn are respectively connected to the signal lines
30
of the first group which in turn are connected to conductive lines on the printed wiring board
45
. The other conductive lines on the printed wiring board
45
arc connected to the signal lines
30
of the second group, and the signal lines
30
of the second group in turn are connected to the receivers R
1
, R
2
, . . . and Rn. The drivers D
1
, D
2
, . . . and Dn are respectively paired with the receivers R
1
, R
2
, . . . and Rn, and, accordingly, the signal lines
30
of the first group are respectively paired with the signal lines
30
of the second group. The signal lines
30
of the first group and the signal lines
30
of the second group are hereinbelow referred to as “signal line pairs”, and the signal line pairs are also labeled with reference numeral
30
.
A pair of conductive lines
46
on the printed board
45
is connected to one of the signal line pairs
30
. The socket
40
has a housing
47
and plural contacts
48
. The housing
47
is formed of insulating material. A large recess is formed in the housing
47
, and is open to the top surface of the housing
47
. The large recess is narrowed in the housing
47
, and the semiconductor device
50
is received in the large recess. Plural small recesses are further formed in the housing
47
, and are open to the bottom surface of the housing
47
. The large recess is connected through pairs of slits to the small recesses.
The contacts
48
are identical in structure with one another, and each of the contacts
48
has a boss portion and a pair of contact leaves A
1
/B
1
, A
2
/B
2
, . . . An/Bn. The plural contacts
48
are snugly received in the small recesses, respectively, and the pairs of contact leaves A
1
/B
1
, A
2
/B
2
, . . . and An/Bn project into the large recess. The pairs of conductive lines
46
are respectively associated with the plural contacts
48
. One of the conductive lines of each pair
46
is connected to the contact leaf A
1
, A
2
, . . . or An of associated one of the contact
48
, and the other of the conductive lines of the pair
46
is connected to the other contact leaf B
1
, B
2
, . . . or Bn of the same contact
48
. Thus, the plural drivers D
1
, D
2
, . . . and Dn are electrically connected through the signal lines
30
of the first group
30
and the associated conductive lines
46
to the plural contact leaves A
1
, A
2
, . . . and An, and the drivers D
1
, D
2
, . . . and Dn, the signal lines
30
of the first group, the associated conductive lines
46
and the contact leaves A
1
, A
2
, . . . and form transmission lines for a driver system. On the other hand, the other contact leaves B
1
, B
2
, . . . and Bn are connected through the other conductive lines and the signal lines
30
of the second group
30
to the receivers R
1
, R
2
, . . . and Rn, respectively, and the contact leaves B
1
, B
2
, . . . and Bn, the other conductive lines
46
, the signal lines
30
of the second group and the receivers R
1
, R
2
, . . . and Rn form transmission lines for a receiver system. The transmission lines for the driver system are electrically connected to the transmission lines for the receiver system through the boss portions encircled in ellipses in
FIG. 1
as well as the solder balls
51
, and form plural dual transmission lines DTL
1
, DTL
2
, . . . and DTLn.
The semiconductor device includes a semiconductor chip (not shown) sealed in a package and ball grid array
51
formed on the bottom surface of the package. The ball grid array
51
has a plurality of solder balls, which are also labeled with reference numeral
51
. The solder balls
51
are laid on a grid pattern on the bottom surface of the package. The semiconductor chip is electrically connected to the solder balls
51
of the ball grip array
51
, and is communicable with the testing system through the ball grip array
51
.
The solder balls
51
are equal in number to the contacts
48
, and the contacts
48
are arranged in the pattern same as the ball grip array
51
. When the semiconductor device
50
is received in the socket
40
, the solder balls
51
are respectively aligned with the pairs of contact leaves A
1
/B
1
. The semiconductor device
50
is pressed against the socket
40
. Then, the solder balls
51
expand the associated pairs of contact leaves A
1
/B
1
, and are inserted into the gaps formed in the pairs of contact leaves A
1
/B
1
, respectively.
One of the dual transmission lines DTL
1
, DTL
2
, . . . and DTLn is shown in FIG.
2
. The dual transmission line shown in
FIG. 2
stands for any one of the dual transmission lines DTL
1
, DTL
2
, . . . and DTLn, and is labeled with “DTL”. The driver and the receiver in the dual transmission line DTL arc respectively labeled with “D” and “R”. The transmission line for the driver system is short circuited with the transmission line for the receiver system at the boss portion of the associated contact
48
, and the boss portion serves as a neutral point
32
of the dual transmission line DTL. Reference “LS” is representative of the inductance of the socket
40
, and reference “Ci”stands for the input impedance of the semiconductor device
50
.
When the drivers D
1
, D
2
, . . . and Dn output input signals SIN
1
, SIN
2
, . . . and SINn, respectively, the signal lines
30
of the first group, the associated conductive lines
46
and the contact leaves A
1
, A
2
, . . . and An propagate the input signals SIN
1
, SIN
2
, . . . and SINn to the solder balls
51
, respectively. Reference “SIN” stands for the input signal SIN
1
, SIN
2
, . . . or SINn propagated through the dual transmission line DTL. The input signals SIN
1
, SIN
2
, and SINn are taken into the semiconductor chip of the semiconductor device
50
. Since the transmission lines for the driver system arc respectively connected to the transmission lines for the receiver system at the neutral points
32
, the input signals SIN
1
, SIN
2
. . . and SINn enter the transmission lines for the receiver system, and the conductive lines
46
and the signal lines
30
of the second group propagate the input signals SIN
1
to the receivers R
1
, R
2
. . . and Rn, respectively, and the input signals SIN
1
, SIN
2
. . . and SINn are sunk into a terminating circuit (not shown).
When the semiconductor chip of the semiconductor device
50
outputs output signals SOUT
1
, SOUT
2
. . . and SOUTn to the solder balls
51
the contact leaves B
1
, B
2
, . . . and Bn, the associated conductive lines
46
and the signal lines
30
of the second group propagate the output signals SOUT
1
, SOUT
2
, and SOUTn to the receivers R
1
, R
2
. . . and Rn, respectively. Reference “SOUT” also stands for the output signals SOUT
1
, SOUT
2
. . . and SOUTn in FIG.
2
. However, the output signals enters the transmission lines for the driver system through the neutral points
32
, and the conductive lines
46
and the signal lines
30
of the se

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