Socket plane

Details Socket plane Socket plane

2001-09-27

2003-05-13

Nasri, Javaid (Department: 2839)

Electrical connectors

Preformed panel circuit arrangement, e.g., pcb, icm, dip,...

With provision to conduct electricity from panel circuit to...

C439S181000

Reexamination Certificate

active

06561820

ABSTRACT:

BACKGROUND
1. Field of the Invention
This invention relates to sockets for electronic device packages, and more specifically to sockets that reduce impedance discontinuity.
2. Background Information
Electronic devices are operating at faster and faster speeds. With this increase in performance, a designer must take into consideration the possibility of increased noise, cross-talk, ringing, etc. that may occur on the signal lines of the electronic device. Electronic devices may reside in any of a number of package technologies, for example, flat pack, dual in-line package (DIP), pinned grid array (PGA), etc. Electronic devices such as microprocessors generally reside on packages with multiple pins such as a PGA. Current PGA socket technology has inherent I/O performance limitations. Manufacturing capability limitations of PGA socket technology limit minimum socket height, socket self inductance, socket loop inductance, and socket pin to pin capacitance. These aspects of the socket design impose impedance discontinuities that limit the performance (i.e., speed) of I/O signaling in electronic device products that use present PGA socket technology.
Currently, these problems have been solved by reducing socket height, controlling pin pitch, optimizing mold material, and optimizing the pin configuration. However, these solutions have limitations. For example, regarding socket height, the height of the socket can only go so small to control inductance. Similarly, pin pitch can only control inductance to a certain degree. Moreover, to reduce impedance discontinuities with pin configuration, one may have to completely surround a signal pin with ground pins. This requires too many pins to practically use a socket for a microprocessor application.
Impedance is equal to the square root of inductance divided by capacitance (I=(SQRT L)/C). Current solutions attempt to control the impedance by controlling the inductance (L). In current solutions however, the inductance is generally too high, or the inductance to capacitance ratio is not controlled to the degree desired. Therefore, when an electronic device in a PGA package, for example, is plugged into a socket, signals on the pins of the PGA package see impedance discontinuities causing signal integrity problems such as noise, ringing, etc. mentioned previously.


REFERENCES:
patent: 3685002 (1972-08-01), Kennedy
patent: 4943891 (1990-07-01), Ouellette
patent: 5481436 (1996-01-01), Werther
patent: 5536181 (1996-07-01), Karnavas

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