Smart memory card architecture and interface

Details Smart memory card architecture and interface Smart memory card architecture and interface

1988-06-15

1989-12-19

Smith, Jerry

Excavating

364900, 36494492, 36518902, G06F 1110

Patent

active

048887730

ABSTRACT:
A "smart" memory card architecture and interface provides significantly increased performance, in part, by using fast access dynamic random access memory (DRAM) technologies which allows up to 8-byte data transfers from the memory card every 27ns after the initial access. The 27ns transfer rate includes the time required for error correction code (ECC), parity generation, and other reliability functions. Only two complementary metal oxide seminconductor (CMOS) integrated circuit (IC) logic chips or modules provide all the function required. The simplicity and flexibility afforded by the "smart" memory card approach provides a means to allow one card interface to be used with a broad range of hardware technologies and in different systems. The architecture of the memory card provides a full range of direct and partial store operations in a manner transparent to the system.

REFERENCES:
patent: 4317201 (1982-02-01), Sedalis
patent: 4556958 (1985-12-01), Ugon
patent: 4710934 (1987-12-01), Traynor
"Fully Self-Contained Memory Card Extended Error Checking/Correcting Hardware Implementation", IBMTAB, vol. 31, No. 5, Oct./1988, pp. 352-355.

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