Smart-cut process for the production of thin semiconductor mater

Details Smart-cut process for the production of thin semiconductor mater Smart-cut process for the production of thin semiconductor mater

1997-08-26

1999-03-16

Dang, Trung

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

Subsequent separation into plural bodies

438455, 438406, 438407, 438977, 438528, 148DIG50, H01L 2130

Patent

active

058829873

ABSTRACT:
A process applicable to the production of monocrystalline films improves on the Smart-Cut.RTM. process by using an etch stop layer in conjunction with the Smart-Cut.RTM. process. Because of the etch stop layer, no chemical-mechanical polishing (CMP) is required after fabrication. Thus, the thickness and smoothness of the device layer in the fabricated silicon on insulator (SOI) substrate is determined by the uniformity and smoothness of the deposited layers and wet etch selectivity, as opposed to the CMP parameters. Therefore, the smoothness and uniformity of the device layer are improved.

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Moriceau, H., et al., "Cleaning and Polishing as Key Steps for Smart-Cut.RTM. SOI Process", Proceedings 1996 IEEE International SOI Conference (Oct. 1996) pp. 152-153.
Aspar, B., et al., "Transfer of structured and patterned thin silicon films using the Smart-Cut.RTM. process", Electronics Letters, vol. 32, No. 21 (Oct. 10, 1996) pp. 1985-1986.

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