Small sector floating gate flash memory

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185110, C365S185020

Reexamination Certificate

active

11129646

ABSTRACT:
To control the problem of program and erase disturb in flash memory arrays having multiple sectors of cells grouped in each isolation wells of the flash memory array, a refresh procedure is used that involves two readings of each of the cells in a “refresh area” of a group under different read timing conditions, with other read conditions being constant or varied as desired. Cells that yield the same result in both reads are not excessively disturbed and need not be reprogrammed. However, cells that read differently may be excessively disturbed and should be reprogrammed. The refresh procedure is particularly suitable for memory arrays with small sector size and many sectors per group. The memory arrays preferably incorporate memory cells that use hot electron programming and Fowler-Nordheim erase.

REFERENCES:
patent: 6005810 (1999-12-01), Wu
patent: 6166959 (2000-12-01), Gupta et al.
patent: 6240032 (2001-05-01), Fukumoto
patent: 6668303 (2003-12-01), Pio
patent: 6768671 (2004-07-01), Lee et al.
patent: 6775184 (2004-08-01), Park et al.

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