Small programmable array to the on-chip control store for microc

Details Small programmable array to the on-chip control store for microc Small programmable array to the on-chip control store for microc

1990-08-02

1993-05-18

Beausoliel, Jr., Robert W.

Excavating

371 102, 371 81, G06F 1100

Patent

active

052126935

ABSTRACT:
An apparatus for correcting a faulty microcode contained in a control store of a microprogrammed processor. The apparatus comprises two functional parts; namely, the detection circuit for detecting operational codes that correspond to faulty microinstructions in the main control store ROM of the system and a programmable array which is used as the storage area for substitute microinstructions. The detection circuit is a circuit which operates as a logic NOR circuit and is utilized to detect valid operational codes of macroinstructions that correspond to microcode sequences that contain errors or faults. The programmable array consists of two loadable RAM's which contain error free microcode to replace the faulty microcode. The detection and correction occurs in parallel with the instruction decoding so that it does not have any impact on system cycle time.

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Sibbers et al., "Patch RAM Load Technique," IBM Technical Disclosure Bulletin, vol. 27, No. 6, Nov. 1984.
IBM Technical Disclosure Bulletin, vol. 31, No. 11, Apr. 1989.

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