Semiconductor device manufacturing: process – Chemical etching
Reexamination Certificate
1999-12-23
2002-03-19
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
C438S692000, C438S693000, C216S088000
Reexamination Certificate
active
06358850
ABSTRACT:
BACKGROUND OF THE INVENTION
While a variety of materials configurations exist in integrate circuit structures, a common element for many integrated circuit structures is the dielectric-filled isolation trench. Isolation trenches are widely used to allow the compact arrangement of electrically active components making up the integrated circuit(s) without adverse effects on electrical operability.
When isolation trench structures are formed in a substrate (e.g., by etching), variation in trench depth often occurs between the various trenches formed on the same substrate level on different parts of the wafer. Typically, the variation may be on the order of about 10% of the intended trench depth. To ensure that all the trenches (across the entire wafer) are completely filled with dielectric isolation material, it is typically necessary to deposit sufficient dielectric material to account for the non-uniformity of trench depth.
The necessity to account for variation in trench depth results in an overfill of the shallower trenches and a fairly thick deposit over the wafer surface. Additionally, the dielectric material (typically an oxide) deposited to fill the trenches is typically conformal to some extent. Thus, the local step topography (step height) of the trenches is reflected at least to some extent in the upper surface of the dielectric deposited to fill the trenches. Large step height is normally encountered in combination with a high “within” wafer (overfill) thickness. The deeper (or more narrow the aspect ratio) the trench to be filled, the greater the step height in the dielectric filling layer and the more overfill is required to ensure complete filling of the trench structures across the wafer.
Generally, the objective in polishing is to remove the deposited dielectric material across the wafer so it remains only within the trenches and presents a planar surface for subsequent processing.
Chemical-mechanical polishing (CMP) has been widely used to improve the quality and manufacturability of integrated circuit device structures. CMP enables improved control of the thickness and topography of the material sections making up the device structures.
In the case of large step height and overfill, a reactive ion etching process (to reduce step height in the deposited dielectric material) is typically required in combination with a conventional slurry chemical-mechanical polishing (CMP) process in order to obtain proper planarization. Reactive ion etch processes are not desirably from the point of cost and/or process control.
Conventional slurry-less CMP (alkaline medium —pH=11—using a fixed abrasive) is generally selective to step height (i.e., capable of reducing step height differential), but where the step height differential is substantial, slurry-less CMP is not capable of performing the necessary material removal without over polishing which results in a non-planar final surface. This deficiency limits use of slurry-less CMP processes to structures with small (e.g., less than 200 Å) variation in trench depth or oxide overfill.
Thus, there is a need for improve polishing processes which are capable of removing material at large step height differential to produce a substantially planar surface while avoiding the need for RIE processing or other undesirable alternatives.
SUMMARY OF THE INVENTION
The invention provides slurry-less chemical-mechanical polishing processes which are effective in planarizing oxide materials, especially siliceous oxides, even where the starting oxide layer has significant topographical variation (e.g., step height differential). The processes of the invention are characterized by the use of a fixed abrasive polishing element and by use of an aqueous liquid medium containing a cationic surfactant for at least a portion of the polishing process involving reduction in the amount of topographic variation (height differential) across the oxide material on the substrate.
In one aspect, the invention encompasses a method of polishing an oxide material layer on a substrate by slurry-less chemical-mechanical polishing, the method comprising:
a) providing a substrate having an oxide material layer on a first surface, the oxide material layer having portions which have a height differential relative to each other, the height being measured from a reference plane parallel with a principal plane of the substrate,
b) providing a first aqueous liquid medium containing a cationic surfactant,
c) contacting the oxide material layer of the substrate with the first aqueous liquid medium and with a polishing member, the polishing member containing a fixed abrasive component therein, and
d) maintaining the contact of step c) while providing movement between the substrate and polishing member, whereby the height differential becomes reduced.
In another aspect, the invention comprises methods having steps (a)-(d) above with the additional steps of:
e) providing a second aqueous liquid medium different from the first medium, the second medium being alkaline,
f) contacting the oxide layer resulting from step d) with the second aqueous liquid medium and with a polishing member, the polishing member containing an abrasive component fixed therein, and
g) maintaining the contact of step f) while providing movement between the substrate and polishing member, whereby the oxide layer becomes reduced in thickness.
Steps (a)-(d) may be sufficient where the overfill of the trenches is uniform (e.g., less than 200 Å variation across the wafer) and such that by the onset of planarization all oxide has been cleared from the up areas. The process using steps (a)-(g) is preferred where significant step height differential or within wafer oxide thickness exists.
The oxide material to be polished is preferably a dielectric material, more preferably silica or boron phosphosilicate glass (BPSG). The changeover to the second aqueous liquid may involve a discrete step of replacing the first liquid entirely may involve (continuously or discontinuously) modifying the first liquid (e.g., to reduce the concentration of cationic surfactant and/or to increase the alkalinity of the liquid). The height differential in the oxide layer is preferably eliminated or substantially reduced before the changeover to the second aqueous liquid.
These and other aspects of the invention are described in further detail below.
REFERENCES:
patent: 5702977 (1997-12-01), Jang et al.
patent: 5733176 (1998-03-01), Robinson et al.
patent: 5738800 (1998-04-01), Hosali et al.
patent: 5759917 (1998-06-01), Grover et al.
patent: 5782675 (1998-07-01), Southwick
patent: 5855804 (1999-01-01), Walker
patent: 5897426 (1999-04-01), Somekh
patent: 5919082 (1999-07-01), Walker et al.
patent: 5958794 (1999-09-01), Bruxvoort et al.
patent: 5972124 (1999-10-01), Sethuraman et al.
patent: 5972792 (1999-10-01), Hudson
patent: 6120571 (2000-09-01), Aihara et al.
patent: 6143663 (2000-11-01), Koutny, Jr.
patent: 6180020 (2001-01-01), Moriyama et al.
Economikos Laertis
Pandey Sumit
Ramachandran Ravikumar
Schutz Ronald J.
Capella Steven
Deo Duy-Vu
Utech Benjamin L.
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