Abrading – Machine – Combined
Reexamination Certificate
2000-08-30
2003-08-05
Eley, Timothy V. (Department: 3724)
Abrading
Machine
Combined
C051S307000, C051S308000, C051S309000, C106S003000, C252S079100, C438S692000, C438S693000
Reexamination Certificate
active
06602117
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to slurries that are useful in chemical-mechanical polishing or chemical-mechanical planarization processes and, more specifically, to slurries that are used to polish or planarize electrically conductive structures of semiconductor devices that include copper and an adjacent tungsten barrier. The present invention also relates to methods for substantially concurrently polishing or planarizing structures formed from copper and tungsten.
2. Background of Related Art
CMP
Chemical-mechanical polishing and chemical-mechanical planarization, both of which are referred to in the art as “CMP”, are abrasive techniques that typically include the use of a combination of chemical and mechanical agents to planarize, or otherwise remove material from a surface of a semiconductor material substrate during the fabrication of devices thereon. A chemical component, typically a slurry that includes one or more oxidizers, abrasives, complexing agents, and inhibitors, oxidizes the surface of one or more material layers that are being polished or planarized (i.e., at least partially removed). A polishing pad formed from a material such as polyurethane or acrylic is used with the slurry and, in combination with abrasives present in the slurry, effects mechanical removal of the layer or layers from the surface of the semiconductor device structure. It should be noted that abrasive-only polishing and planarization, e.g., without the use of active chemical agents to effect material removal, are becoming more prevalent due to environmental concerns. Thus, the term “CMP” as used herein encompasses such abrasive-only (i.e., strictly mechanical) methods and apparatus.
Conventional CMP pads are round, planar, and have larger dimensions than the semiconductor substrates (e.g., wafers or other substrates including silicon, gallium arsenide, indium phosphide, etc.) upon which the structures or layers to be planarized or otherwise polished have been formed. In polishing one or more layers or structures formed on a substrates the substrate and the conventional CMP pad are rotated relative to one another, with the location of the substrate being moved continuously relative to the polishing surface of the pad so that different areas of the pad are used to polish one or more of the layers or structures formed on the substrate.
Another polishing format is the so-called “web” format, wherein the pad has an elongated, planar configuration. The web is moved laterally from a supply reel to a take-up reel so as to provide “fresh” areas thereof for polishing one or more layers or structures formed on a semiconductor substrate. A similar, newer polishing format is the so-called “belt” format, wherein the pad is configured as a belt, or continuous loop, of polishing material. In both the “web” and “belt” formats, the semiconductor substrate is rotated or revolved upon being brought into contact with the pad. The pad is moved when a “fresh” polishing surface is needed or desired.
A new type of polishing pad, known in the art as a fixed-abrasive pad, may be used to polish or planarize layers formed on a semiconductor substrate. Fixed-abrasive pads, which may be embodied in the conventional, web, or belt formats, are typically formed from an acrylic material and embedded with particles of abrasive materials. The pad and embedded abrasives effect the mechanical part of CMP processes. During use of the fixed-abrasive pad to planarize or polish one or more layers on the surface of a semiconductor device during fabrication thereof, the abrasive material is exposed at a polishing surface of the pad. Some of the abrasive material may also be leached out of the pad. As a result of the inclusion of abrasive particles in the pad, the chemical slurries that are used to effect the chemical portion of chemical-mechanical polishing or chemical-mechanical planarization need not include the abrasives that are often required when conventional, abrasive-free pads are employed.
Copper Conductive Structures
The use of copper as a conductive material in semiconductor devices is also ever-increasing. When copper is used in semiconductor devices, however, a barrier layer is typically required between the copper and adjacent structures or layers. The barrier layer prevents diffusion of the copper into the adjacent layers or structures, as well as the formation of copper silicides, both of which may cause electrical shorts in semiconductor devices that include copper. Tantalum is an example of a material that is useful as a copper barrier. When tantalum is used, the semiconductor device, including any features thereof into which copper is to be disposed (e.g., trenches), is lined with a layer of tantalum. The tantalum layer is then typically covered with a thin copper layer, often formed by physical vapor deposition (“PVD”) processes. The thin copper layer then acts as a so-called “seed layer” for the formation of a copper structure, such as a conductive line, such as by electroplating processes.
Once the tantalum and copper layers have been formed, it is necessary to isolate separate tantalum-copper conductive structures from one another. CMP processes are typically used to remove the tantalum and copper between the structures from over the active surface of the semiconductor device being fabricated. Slurries that are used in copper CMP processes typically have a pH of about 7.0. Many of these slurries include hydrogen peroxide (H
2
O
2
) as an oxidizing agent. Since hydrogen peroxide readily generates hydroxy free radicals (OH.), hydrogen peroxide is a very strong oxidizing agent. Tantalum, however, is substantially chemically inert. Thus, the oxidizers of CMP slurries that remove copper do not effectively oxidize tantalum and, thus, do not adequately effect the removal of tantalum. Likewise, slurries that are useful for removing tantalum by CMP processes are likewise not effective for removing copper. As a result, when conventional CMP processes are used to isolate the tantalum-copper conductive structures of a semiconductor device, two separate slurries must be used.
It has been proposed that tungsten be used in place of tantalum in semiconductor devices as a barrier material for copper conductive structures. Nonetheless, when known copper CMP slurries are used to substantially simultaneously CMP tungsten and copper, the tungsten barrier layer may dissolve, or be removed, at a faster rate than the copper. This is at least partially because, as the following chemical equations illustrate, tungsten (W) is more readily oxidized than copper (Cu):
W
+
2
H
2
O
→
4
H
+
+
4
e
-
+
WO
2
E
0
=
0.12
;
C
u
→
(
C
u
)
2
+
+
2
e
-
E
0
=
-
0.34
.
Thus, in conventional slurries, although both copper and tungsten are simultaneously exposed to the same oxidants, the tungsten will typically be oxidized first. As a result, gaps may form in locations where the barrier material should be located between copper conductive structures and adjacent portions of the semiconductor device structure upon which the conductive structures are being fabricated.
This phenomenon is illustrated in the electron micrograph of
FIG. 1
, which illustrates a semiconductor device structure
10
that includes the portions of a copper layer
20
and an underlying tungsten barrier layer
18
disposed within a recess
14
formed in an active surface
16
of a substrate
12
of semiconductor device structure
10
following CMP thereof using an alumina fixed-abrasive polishing pad and a copper CMP slurry having a pH of about 7. Once an interface
19
between barrier layer
18
and copper layer
20
was exposed during the CMP process, tungsten of barrier layer
18
was oxidized and dissolved at a faster rate than the adjacent copper of copper layer
20
, leaving a gap
21
between copper layer
20
and adjacent regions of substrate
12
, as well as undesirably permitting copper of copper
Chopra Dinesh
Sinha Nishant
Eley Timothy V.
Micro)n Technology, Inc.
TraskBritt
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