Slurry for chemical-mechanical polishing copper damascene...

Details Slurry for chemical-mechanical polishing copper damascene... Slurry for chemical-mechanical polishing copper damascene...

2000-10-19

2003-01-21

Kunemund, Robert (Department: 1765)

Compositions

Etching or brightening compositions

C438S692000

Reexamination Certificate

active

06508953

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a slurry for chemical-mechanical polishing copper damascene structures, and more particularly, to a slurry that retards copper line corrosion during the chemical-mechanical polishing of copper overlaying a tantalum-based barrier layer during the fabrication of copper damascene structures.
BACKGROUND OF THE INVENTION
Integrated circuits are made up of millions of active devices formed in or on a substrate such as silicon or gallium arsenide. The active devices are typically isolated from each other using silicon-based dielectric materials. The active devices are usually formed in multiple layers that are interconnected to form functional circuits and components. Interconnection of active devices is typically accomplished through the use of well-known multilevel interconnection processes such as the process disclosed in Chow et al., U.S. Pat. No. 4,789,648.
Copper is a highly preferred electrically conductive material for use in fabricating integrated circuits because it has superior electromigration resistance and lower resistivity than many other electrically conductive materials such as aluminum. Copper wiring and interconnects allow for the use of higher critical current in integrated circuits, which can greatly improve the performance capabilities of such devices.
The use of copper in integrated circuits, however, does present some difficult challenges. Copper readily diffuses into conventional silicon-based dielectric materials such as polysilicon, single-crystalline silicon, silicon dioxide, low-k inorganic and organic materials, and the like. Once these silicon-based materials have been contaminated with copper atoms, the dielectric constant of the silicon-based dielectrics is adversely affected. In addition, once semiconductive silicon-based materials are copper doped, transistors made within or in close proximity to the copper doped silicon-based regions either cease to function properly or are significantly degraded in electrical performance. Therefore, a barrier layer or liner film must be applied to the silicon-based dielectric layer in order to prevent copper diffusion.
One of the presently preferred methods of fabricating integrated circuits having copper wiring and interconnects, which are also known as copper damascene structures, generally comprises providing interconnected copper wiring or metallization patterns in discrete layers of dielectric film. The materials typically used to form these dielectric film layers include phosphosilicate glass, borophosphosilicate glass, and silicon dioxide. The dielectric layer is etched or otherwise processed to pattern a series of trenches and/or holes therein. A thin barrier layer or liner film, generally not more than approximately 300 Å thick is then deposited over the patterned dielectric layer. Preferred barrier layers or liner films comprise thin films of tantalum (Ta) or tantalum nitride (TaN) or both Ta and TaN disposed over one another to form a Ta/TaN stack. Such liners are commonly deposited by physical vapor deposition, which is also known as sputter deposition, or they may be deposited by a chemical vapor deposition to form a more conformed coating. The Ta and/or TaN liner coats the surfaces of the trenches and holes as well as the upper surface of the dielectric layer to prevent copper atom diffusion and also to provide good adhesion between the copper layer and the dielectric layer. A layer of copper approximately 3,000-15,000 Å thick is then deposited over the liner layer so as to completely fill the trenches and/or holes. The filled trenches thus form a network of copper lines whereas the filled holes form vias or interconnects. The final step in the process of fabricating an integrated circuit, which is also known as the copper damascene process, is removing the copper layer and tantalum-based barrier layer from the upper surface of the dielectric film layer leaving only the copper filled trenches and holes. This is typically accomplished by chemical-mechanical polishing.
In a typical chemical-mechanical polishing process, the metallized surface of the copper damascene structure is placed in direct contact with a rotating polishing pad at a controlled downward pressure. A chemically reactive solution commonly referred to as a “slurry” is present between the pad and the surface of the copper damascene structure during polishing. The slurry initiates the polishing process by chemically reacting with the surface of the metal film being polished. The polishing process is facilitated by the rotational movement of the pad relative to the substrate and the presence of the slurry at the film/pad interface. Polishing is continued in this manner until the desired film or films are removed.
The composition of the slurry is an important factor in determining the rate at which metal film layers are removed by chemical-mechanical polishing. If the chemical agents in the slurry are selected properly, the slurry can be tailored to provide effective polishing of specific film layers at desired polishing rates while minimizing the formation or creation of surface imperfections or defects. In some circumstances, the polishing slurry can preferably provide controlled polishing selectivities for one or more thin film materials relative to other thin-film materials.
Prior art chemical-mechanical polishing slurries used to remove copper overlaying tantalum-based barrier layers have exhibited a high selectivity for copper as compared to the tantalum-based materials. This advantageously permits the rapid removal of the copper layer overlaying the tantalum-based barrier layer. However, the aggressive chemical action of these prior art polishing slurries disadvantageously tends to corrode the copper lines of the copper damascene structure during polishing, resulting in failure of the active devices or inconsistency in their performance.
A need exists for an improved chemical-mechanical polishing slurry for use in removing copper overlaying a tantalum-based barrier layer during the fabrication of a copper damascene structure. Such an improved chemical-mechanical polishing slurry would preferably remove copper overlaying tantalum-based barrier layers at a high enough rate to insure acceptable throughput while at the same time retarding the corrosion of copper lines.
SUMMARY OF THE INVENTION
The present invention provides a slurry for chemical-mechanical polishing copper damascene structures, and more particularly, to a slurry that retards copper line corrosion during the chemical-mechanical polishing of copper overlaying a tantalum-based barrier layer during the fabrication of copper damascene structures. The slurry according to the invention comprises an oxidizing agent that releases free radicals and a non-chelating free radical quencher that is effective to retard the corrosion of said copper lines during chemical-mechanical polishing. The oxidizing agents that release free radicals used in the slurry according to the invention are preferably selected from the group consisting of peroxides, peroxydiphosphates, and persulfates. The non-chelating free radical quenchers used in the slurry according to the invention are preferably selected from the group consisting of ascorbic acid, thiamine, 2-propanol, and alkyl glycols, with ascorbic acid being most preferred. The non-chelating free radical quenchers in the chemical-mechanical polishing slurry according to the invention surprisingly retard copper line corrosion during the polishing of copper damascene structures without reducing the copper polishing rate to unacceptable levels. The anti-corrosion effect is independent of pH, but when the pH of the slurry is adjusted to from about 4.0 to about 7.0, the removal rate of copper is maximized.
The foregoing and other features of the invention are hereinafter more fully described and particularly pointed out in the claims, the following description setting forth in detail certain illustrative embodiments of the invention, these being indicative, however, of but a few of

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