Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Slope control of leading or trailing edge of rectangular or...
Reexamination Certificate
1999-06-02
2001-04-24
Nguyen, Viet Q. (Department: 2818)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Slope control of leading or trailing edge of rectangular or...
C327S109000, C327S113000, C327S172000, C327S263000, C327S380000, C327S374000, C326S026000, C326S083000
Reexamination Certificate
active
06222403
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a slew rate output circuit, and more particularly to a slew rate output circuit with an improved driving capability of driving an output MOS field effect transistor in a semiconductor integrated circuit.
In some fields of applications of the semiconductor integrated circuits, the slew rate function may be required. This slew rate function is to prevent rapid ON/OFF switching operations of the output transistor upon variation in voltage level of an input pulse signal, so as to reduce a variation speed of the waveform of the output signal. This slew rate function is capable of preventing appearance of noises on power lines or ground lines of MOS field effect transistor integrated circuits. This slew rate function is also capable of preventing appearances of overshoot and undershoot of the waveforms of the output signals. This slow rate function is also capable of causing drop of a flyback voltage of an inductance load.
FIG. 1
is a circuit diagram illustrative of one of the conventional slew rate output circuit of open drain type for driving an output MOS field effect transistor, wherein the output MOS field effect transistor Q
0
has an n-channel type and has a source electrode connected through a load R
L
to a power voltage line V
dd
and a drain electrode connected to a ground line as well as has a gate electrode which is controlled by two constant currents IrH, I
rL
. A Circuit configuration of this conventional open drain type slew rate output circuit for driving an output MOS field effect transistor is as follows.
An output n-channel MOS field effect transistor Q
0
is provided to be connected in series between a first power voltage line providing a first power voltage V
dd
and a ground line providing a ground potential, wherein a source electrode connected through a load R
L
to the first power voltage line V
dd
whilst a drain electrode connected to the ground line. The source electrode of the output n-channel MOS field effect transistor Q
0
is connected to an output terminal, so that a voltage of the source is an output voltage Vout and a current through the load R
L
is an output current Iout. A series connection of p-channel and n-channel MOS field effect transistors Q
1
and Q
2
is provided to be connected in series between a second power voltage line providing a second power voltage V
cc
and the ground line providing the ground potential, wherein the p-channel MOS field effect transistor Q
1
is connected through a first constant current source CS
1
supplying a first constant current IrH to the second power voltage line providing the second power voltage V
cc
, whilst the n-channel MOS field effect transistor Q
2
is connected through a second constant current source CS
2
supplying a second constant current IrL to the ground line providing the ground potential. An intermediate point between the p-channel and n-channel MOS field effect transistors Q
1
and Q
2
is connected to a gate of the above output n-channel MOS field effect transistor Q
0
. A gate of the p-channel MOS field effect transistor Q
1
is connected to an output side of a first invertor I
1
which has an input side receiving an input pulse signal Vin so that the input pulse signal Vin is inverted by the first invertor I
1
to be entered into the gate of the p-channel MOS field effect transistor Q
1
, whilst a gate of the n-channel MOS field effect transistor Q
2
is connected to an output side of a second invertor I
2
which has an input side receiving the above input pulse signal vin so that the input pulse signal Vin is inverted by the second invertor I
2
to be entered into the gate of the n-channel MOS field effect transistor Q
2
.
Operations of the above conventional open drain type slew rate output circuit for driving the output MOS field effect transistor will be described.
FIG. 2
is a diagram illustrative of waveforms of the conventional open drain type slew rate output circuit of
FIG. 1
When the input pulse signal Vin is changed from a low level to a high level, the high level input pulse signal Vin is inverted by the first and second invertors I
1
and I
2
and made into the low level gate input signals to be entered into the gates of the p-channel and n-channel MOS field effect transistors Q
1
and Q
2
, so that the p-channel MOS field effect transistor Q
1
turns ON, whilst the n-channel MOS field effect transistor Q
2
turns OFF, whereby the first constant current IrH is supplied through the first constant current source CS
1
to the gate of the output n-channel MOS field effect transistor Q
0
. As a result, an input capacitance of the output n-channel MOS field effect transistor Q
0
is charged so that a gate voltage level of the output n-channel MOS field effect transistor Q
0
is gradually risen to the high level until the input capacitance of the output n-channel MOS field effect transistor Q
0
is charged up thereby to render the output n-channel MOS field effect transistor Q
0
turn ON, whereby the load R
L
is made conductive to the ground line and the output voltage level Vout is dropped toward the ground level. In
FIG. 2
, Vgate means the gate voltage level of the output n-channel MOS field effect transistor Q
0
.
When the input pulse signal Vin is changed from the high level to the low level, the low level input pulse signal Vin is inverted by the first and second investors I
1
and I
2
and made into the high level gate input signals to be entered into the gates of the p-channel and n-channel MOS field effect transistors Q
1
and Q
2
, so that the p-channel MOS field effect transistor Q
1
turns OFF, whilst the n-channel MOS field effect transistor Q
2
turns ON, whereby the second constant current IrL is supplied through the second constant current source CS
2
to the gate of the output n-channel MOS field effect transistor Q
0
. As a result, the input capacitance of the output n-channel MOS field effect transistor Q
0
is discharged so that a gate voltage level of the output n-channel MOS field effect transistor Q
0
is gradually fallen to the low level until the input capacitance of the output n-channel MOS field effect transistor Q
0
is discharged down thereby to render the output n-channel MOS field effect transistor Q
0
turn OFF, whereby the load R
L
is made non-conductive to the ground line and the output voltage level Vout is risen toward the high level.
A falling time of the output voltage level Vout of the slew rate output circuit depends upon a rising time of the gate voltage of the output n-channel MOS field effect transistor Q
0
. This rising time of the gate voltage of the output n-channel MOS field effect transistor Q
0
further depends upon both the input capacitance of the output n-channel MOS field effect transistor Q
0
and the first constant current IrH supplied through the first constant current source CS
1
. Therefore, the falling time of the output voltage level Vout of the slew rate output circuit or a turn-ON time depends upon both the input capacitance of the output n-channel MOS field effect transistor Q
0
and the first constant current IrH supplied through the first constant current source CS
1
. This means that the falling time of the output voltage level Vout of the slew rate output circuit or the turn-ON time is controllable by controlling both the input capacitance of the output n-channel MOS field effect transistor Q
0
and the first constant current IrH supplied through the first constant current source CS
1
.
A rising time of the output voltage level Vout of the slew rate output circuit depends upon a falling time of the gate voltage of the output n-channel MOS field effect transistor Q
0
. This falling time of the gate voltage of the output n-channel MOS field effect transistor Q
0
further depends upon both the input capacitance of the output n-channel MOS field effect transistor Q
0
and the second constant current IrL supplied through the second constant current source CS
2
. Therefore, the rising time of the output voltage level Vout of the slew rate output circu
NEC Corporation
Nguyen Viet Q.
Young & Thompson
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