Slew rate controlled power amplifier

Amplifiers – With semiconductor amplifying device – Including current mirror amplifier

Reexamination Certificate

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Details

C330S290000, C323S315000, C318S432000

Reexamination Certificate

active

06268772

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to improvements in mass data storage devices, or the like, and more particularly to improvements in polyphase dc motor driver circuits for use in mass data storage devices, or the like, and still more particularly to improvements in circuits used to control the commutation current slew rate in polyphase dc motor driver circuits for use in mass data storage devices, or the like.
2. Relevant Background
A conventional low-side current-mode power amplifier circuit
10
used in the prior art is shown in FIG.
1
. The circuit may be used as a low-side driver circuit in a commutated motor drive circuit with an accompanying high-side driver circuit (not shown). The power amplifier
10
is connected to drive to a low potential one phase of a DC motor (not shown), which may include multiple phases, typically three phases, to which current is commutatively switched in known manner.
More particularly, the circuit
10
is connected to one of the coils
12
of the motor to sink current in the phase through a NMOS transistor
14
. The NMOS transistor
14
is referred to herein as a power FET. A resistance
16
is associated with the coil
12
of value R
M
. The inductance of the coil
12
is L
M
.
As shown in
FIG. 1
, a linear reference current input is converted into a voltage across resistor
26
. The voltage is then provided to the non-inverting node of an OTA
22
whose output drives the gate of the power FET
14
as well as a mirror FET
20
. An identical or ratioed magnitude of the current in the mirror FET
20
is thus mirrored by the diode-connected FET
32
in its mirror FET
30
and then converted into a voltage across resistor
24
and fed back to the inverting node of the OTA
22
. The high gain of the OTA
22
forces the currents flowing through resistors
24
and
26
to be substantially equal provided that resistors
24
and
26
are equal. The dominant pole of this circuit is set by the gate capacitance of the power FET
14
.
The current through the mirror FET
20
is controlled by the OTA
22
which has an inverting input connected to a resistor
24
through which a current flows and a non-inverting input connected to a resistor
26
through which a reference current supplied by a constant current source
28
flows. The diode-connected FET
32
with its mirror FET
30
controls the current through resistor
24
. It should be noted that the current I
MOTOR
through the power FET
14
is proportional to the current through the mirror FET
20
. Thus, controlling the current though the mirror FET
20
provides a means to control the current through the power FET
14
.
However, the current flowing through the mirror FET
20
is not linearly proportional to the current flowing through the power FET
14
, due to possibly substantial difference in their drain-to-source voltages in both transient and steady-stage responses. Most of all, the design of the OTA can be rather difficult due to the low-frequency pole introduced by the inherent motor inductance L
M
and the motor resistance R
M
. In most cases, the loop bandwidth must be severely compromised to guarantee the loop stability.
SUMMARY OF THE INVENTION
According to a broad aspect of the invention, a slew rate controlled power amplifier for use in a dc motor driver circuit is presented. The amplifier has a power transistor connected to control a drive current in a phase of the dc motor with which it is associated and to develop an output voltage on the phase in accordance with the drive current. A mirror transistor is connected to establish a ratioed magnitude of the current in the power transistor, and a feedback circuit connected to controllably feed back the output voltage to the mirror transistor to control the drive current. A commutatively operated slew-rate control circuit is connected to the feedback circuit to control the drive current. The amplifier may also include a voltage-equalizing transistor in series with the mirror transistor. An amplifier may be connected with a first input connected between the voltage-equalizing transistor and the mirror transistor, a second input connected to the output voltage and an output connected to control a current in the voltage-equalizing transistor, so that the voltage-equalizing transistor tends to equalize voltages applied to the first and second inputs.
According to another broad aspect of the invention, a driver circuit for a phase of a dc motor is presented. The driver circuit includes a power transistor connected to control a drive current in a phase of the dc motor and to develop an output voltage on the phase. A mirror transistor is connected to establish a ratioed magnitude of the drive current. A current flowpath is established through a resistor to provide a reference voltage to one input of an amplifier, and a feedback current flowpath is connected to receive the output voltage to feed back a voltage to another input of the amplifier. A bias current flowpath controlled by a commutatively operated slew-rate control circuit establishes a bias in the feedback current flowpath to control the current therein and the voltage fed back to the amplifier. A voltage-equalizing transistor may be provided in series with the mirror transistor, controlled by an amplifier having a first input connected between the voltage-equalizing transistor and the mirror transistor and a second input connected to the output voltage The voltage-equalizing transistor tends to equalize voltages applied to the first and second inputs.
According to yet another broad aspect of the invention, a driver circuit is presented for a phase of a dc motor. The driver circuit has a power transistor connected to control a drive current in the phase and to develop an output voltage on the phase. A mirror transistor establishes a ratioed magnitude of the current in the power transistor, and a current flowpath includes a resistor, connected to develop a control voltage for application to the non-inverting input of an amplifier. A feedback circuit feeds back a voltage developed on the output node to the inverting input of the amplifier. A voltage-equalizing transistor is connected in series with the mirror transistor. An amplifier has a first input connected between the voltage equalizing transistor and the mirror transistor, a second input connected to the output voltage and an output connected to control a current in the voltage equalizing transistor, whereby the first and second inputs tend to have equal voltage.
According to still another broad aspect of the invention, a method is presented for driving a dc motor. The method includes controlling an output current in a phase of the dc motor to develop an output voltage on the phase. The output current is controlled according to a mirror current of a current mirror circuit, and feeding back the output voltage to the current mirror circuit to control the mirror current and the output current in accordance with a predetermined slew rate.
One advantage provided by the invention is that a linear power amplifier can be provided for HDD mobile servo applications such that the slew rate of the current flowing through the power FET is well controlled while the high-frequency stability of the phase voltage is maintained.


REFERENCES:
patent: 5525927 (1996-06-01), Yung et al.
patent: 5570060 (1996-10-01), Edwards
patent: 5614797 (1997-03-01), Carobolante
patent: 5661383 (1997-08-01), Schlager et al.
patent: 5754066 (1998-05-01), Smith
patent: 6107789 (2000-08-01), Fryer et al.

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