Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Slope control of leading or trailing edge of rectangular or...
Reexamination Certificate
2000-07-19
2002-03-19
Ton, My-Trang Nu (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Slope control of leading or trailing edge of rectangular or...
Reexamination Certificate
active
06359484
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to the design of integrated circuit products in the semiconductor industry and more particularly to a slew-rate-control circuit that controls different stages of the transitions of an output signal.
Slew-rate-control circuits generally ensure that the output voltage waveforms do not exhibit ringing. The most widely used slew-rate control for output voltage consists of coupling a resistor, also referred to as a slew-rate-control (SRC) resistor, in series with the gate capacitance of a driver transistor.
FIG. 1A
shows a schematic diagram of a circuit buffer
100
having a conventional slew-rate-control structure
110
(
110
a
and
110
b
) for high-frequency operation. The SRC resistor (
110
a
and
110
b
) couples in series with the gate capacitance of the driver transistor (
112
and
114
, respectively) to create a combination of resistance and capacitance, referred to as the RC. The RC gives exponential transition (rising and falling) output voltage waveforms from the driver transistor.
The RC controls the internal current and capacitances of the driver transistor which in turn control the slope of output waveform at an output node
116
. This slope is known as the slew rate (SR). Stated differently, the SR is the maximum rate of change of the output voltage, (d
v
/d
t
)
max
. The SRC resistor thus contributes to the RC delay such that the resistance is inversely proportional to the SR, or 1/R ∝ SR. Accordingly, if the resistance increases, the SR decreases, and vice versa.
FIG. 1B
shows an output waveform
120
of simulation results of a conventional slew rate control structure.
FIG. 1B
also shows a slew rate waveform
120
′, a derivative, (d
v
/d
t
), of output waveform
120
. A disadvantage is that the initial and final stages of the transition are drastically increased, increasing the overall transition time. The initial stage is defined from the 0% to 10% portion
130
a
of the rising waveform and from the 100% to 90% portion
130
b
of the falling waveform. The middle stage is defined from 10% to 90% portion
135
of the transition from low to high (rising), and from high to low (falling). The final stage is defined from the 100% to 90% portion
140
a
of the rising waveform and from the 0% to 10% portion
140
b
of the falling waveform.
Another disadvantage with the conventional approach is that it causes an increased resistance and capacitance. This further increases the time during the initial stage of the transition. Specifically, during the initial stages of the output voltage transition, the pre-driver transistors are not fully turned-on resulting in a higher resistance in series with the gate capacitance. Also, the gate capacitance is in transition from a high value in accumulation to a low value in inversion. Hence, the gate capacitance may be slightly higher during the initial stages of the transition of the output voltage.
It is desirable in integrated-circuit chips to have waveforms which transition in a controlled manner. It is also desirable to keep the maximum SR below a specified value to reduce the inductive bounce noise at ground and V
DD
. It is also desirable to achieve this reduced slew rate without significantly compromising the operation speed of the circuit.
SUMMARY OF THE INVENTION
The present invention achieves the above needs and objectives with a new and improved slew-rate-control circuit that controls different stages of the transitions of an output signal. More particularly, the present invention provides an integrated circuit driver having multiple resistance paths that switch on at different stages of the rising and falling transitions of the driver's output signal waveform. The driver has a control circuit configured to turn on the one or more resistance paths during at least one predetermined stage of the output signal during transitions, thus reducing the control circuit's effective resistance to control the slope of the transitions during the predetermined stage. The predetermined stage is one of an initial-stage, mid-stage, and final-stage of the output signal transitions.
In a specific embodiment, at least one transistor can provide a resistance path, the transistor being configured to switch on during at least one predetermined stage of the output signal during transitions.
In another specific embodiment, the driver circuit can have at least two complementary output transistors, at least one resistance control transistor being biased by a voltage at the output node or a voltage from the output node through an inverter. Alternatively, the control transistor can also be biased by a voltage at the gate of at least one of the complementary output transistors.
In another specific embodiment, the driver can have at least one feedback circuit having an input coupled to the gate one of the complementary transistors and an output coupled to the gate of at least one of the control transistors.
In another specific embodiment, the driver can have a high-voltage circuit coupled between the output node and the control circuit to protect the control circuit against high-voltages.
The present invention achieves the above purposes and benefits in a simple, versatile, and reliable circuit and method that is readily suited to the widest possible utilization. The present invention achieves these purposes and benefits in the context of known circuit technology and known techniques in the electronic arts. Further understanding, however, of the nature, objects, features, and advantages of the present invention is realized by reference to the latter portions of the specification, accompanying drawings, and appended claims. Other objects, features, and advantages of the present invention will become apparent upon consideration of the following detailed description, accompanying drawings, and appended claims.
REFERENCES:
patent: 5319260 (1994-06-01), Wanlass
patent: 5623216 (1997-04-01), Penza et al.
patent: 6064230 (2000-05-01), Singh
patent: 6163178 (2000-12-01), Stark et al.
Exar Corporation
Nu Ton My-Trang
Townsend and Townsend / and Crew LLP
LandOfFree
Slew-rate-control structure for high-frequency operation does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Slew-rate-control structure for high-frequency operation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Slew-rate-control structure for high-frequency operation will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2887992