Sleep mode controller for power management

Patent

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Details

39575007, 395556, G06F 1516

Patent

active

057686025

ABSTRACT:
A sleep mode controller, useful for an electronic device such as a computer, can supply multiple clocks with appropriate synchronization and which is capable of dynamic speed switching. The device provides clock signals at various speeds and relationships which can in turn be used to support various functions of the electronic device. The sleep mode controller can be activated and smoothly transition various clock signals from one time domain to a second time domain, each of which has predetermined speeds and clock-signal relationships. Dynamic speed switching is used to reset timing (bus and processor clock) sensitive elements such that computer machine speed (bus and processor clock frequencies) can be changed dynamically without interruption of I/O services or general OS and application level functions.

REFERENCES:
patent: 5511203 (1996-04-01), Wiser et al.
patent: 5560017 (1996-09-01), Barrett et al.

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