Electrical computers and digital processing systems: multicomput – Master/slave computer controlling – Master/slave mode selecting
Reexamination Certificate
1997-12-10
2001-03-27
An, Meng-Ai T. (Department: 2783)
Electrical computers and digital processing systems: multicomput
Master/slave computer controlling
Master/slave mode selecting
C709S210000, C709S211000, C710S107000, C710S110000, C713S600000, C712S031000
Reexamination Certificate
active
06209022
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a communications system which has at least one slave station controlled by a master station. The slave station(s) here cannot operate without the master station.
A communications system can be realized, for example, by means of the I
2
C (Inter IC) bus. A plurality of master stations and a plurality of slave stations are connected to the I
2
C bus via open-collector outputs. The master stations control the slave stations using addresses which are known to them and which are permanently stored in the slave stations.
It is possible, in the case of the I
2
C bus, for two master stations simultaneously to attempt to access the bus in order to address slave stations. For this case, a so-called arbitration procedure is provided for the I
2
C bus. In this procedure, the competing master stations simultaneously transmit bit by bit in each case one individual identification code, stored in them, into a precharged line of the bus via their open-collector outputs. The potential of the line is drawn to ground as soon as one of the bits which is about to be output has a high level, even if the bit of the other master station has a low level. Each of the master stations monitors whether that bit of its identification code which has just been output has a high level when the line is being discharged. If this is not the case, the master station deactivates itself and that master station whose identification code with all its bits is decisive for the successive potential states of the line manages to access the bus.
A disadvantage of the I
2
C bus is that the maximum data rate is limited by the exclusive use of open-collector outputs.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a communications system with a master unit and at least one slave unit controlled by the master unit, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type in which, on the one hand, it is possible to connect any desired number of slave stations whose addresses and whose number are not known beforehand to the master station controlling them, and in which, on the other hand, the maximum data rate is improved in comparison with that of the I
2
C bus.
With the foregoing and other objects in view there is provided, in accordance with the invention, a communications system, comprising:
a master station, at least one slave station, and at least one line connecting the master and slave stations;
the at least one slave station including a first output circuit and a second output circuit each having an output commonly connected to the at least one line;
the first output circuits of the at least one slave station, in a first operating mode of the system, outputting an identification code bit by bit to the line; and.
in a second operating mode, the master station addressing the at least one slave station and the second output circuit of the slave station transmitting different data to the master station through the line.
In accordance with an added feature of the invention, the at least one slave station is one of a plurality of slave stations and, wherein, in the first operating mode, the output circuits of the plurality of slave stations output identification codes simultaneously bit by bit to the line.
In accordance with an additional feature of the invention, in the second operating mode, the master station addresses a selected one of the slave stations and only the respectively addressed slave station transmits different data to the master station.
In accordance with another feature of the invention, the master station contains a clock generator and the clock signal is transmitted through a clock line to the at least one slave station. The clock signal synchronizes the operation of the master station and the slave stations; wherein a clock rate of the clock signal is lower in the first operating mode than in the second operating mode.
In accordance with a further feature of the invention, connecting devices are provided for connecting the slave stations. The connecting devices include detectors for detecting whether a respective slave station is connected and for transmitting a corresponding signal to the master station.
With the above and other objects in view there is also provided, in accordance with another feature of the invention, a slave station for a communications system operable in two distinct operating modes, comprising:
a first output circuit with an output outputting an identification code bit by bit in a first operating mode of the communications system; and
a second output circuit with an output outputting data different from the identification code in a second operating mode of the communications system;
wherein the outputs of the first and second output circuits are connected to one another.
In accordance with again a further feature of the invention, the first output circuit assumes a state with a relatively higher impedance when a datum of a first logic state is output and a state with a relatively lower impedance when a datum of a second logic state is output.
The invention permits the slave stations to be identified by the master station in a first operating mode with low system clock rate by using the first output circuits and a data transfer in a second operating mode with a high clock rate by using the second output circuits.
In the first operating mode, the first output circuits can be operated in parallel in a “wired-or” connection and permit the slave stations to be identified by the master station. This is achieved in that the first output circuit assumes a state with higher impedance when a datum of a first logic state is output than when a datum of a second logic state is output. A first output circuit of this type is for example an open-drain or open-collector output circuit which, however, has a relatively low switching speed in comparison with tristate output circuits.
In accordance with a concomitant feature of the invention, the second output circuit is a tristate output circuit. With such tristate outputs it is possible to achieve higher data rates in the second operating mode, in which the system is usually in, than with the I
2
C bus.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a communications system with a master station and at least one slave station, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
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Born Christine
Endriss Heinz
Gossmann Timo
Mehrgardt Söhnke
Sotek Karel
An Meng-Ai T.
El-Hady Nabil
Greenberg Laurence A.
Infineon - Technologies AG
Lerner Herbert L.
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