Skew-free clock circuit for integrated circuit chip

Details Skew-free clock circuit for integrated circuit chip Skew-free clock circuit for integrated circuit chip

1982-12-22

1984-10-23

Atkinson, Charles E.

Excavating

307265, 307269, H03K 506

Patent

active

044792166

ABSTRACT:
An op-amp feedback arrangement is used to provide non-skewed clock pulses from a source of skewed clock pulses. Any skew in the clock-in pulses results in a change in the average voltage of a clock-out pulse at the output of the arrangement. The average voltage of the clock-out pulse is compared to a reference voltage to produce a control signal which adjusts the average voltage at the output. Critical transitions in the clock pulses occur at precise time relationships under the control of the control signal.

REFERENCES:
patent: 3712994 (1973-01-01), Graziani
patent: 4135160 (1979-01-01), Gagliani
patent: 4239992 (1980-12-01), Perkins
patent: 4241418 (1980-12-01), Stanley
patent: 4277697 (1981-07-01), Hall et al.
patent: 4355283 (1982-10-01), Ott

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