SiP substrate

Active solid-state devices (e.g. – transistors – solid-state diode – Encapsulated

Reexamination Certificate

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Details

C257SE23031

Reexamination Certificate

active

07893548

ABSTRACT:
Disclosed in this specification is a system-in-a-package substrate that includes an interconnect substrate for permitting finely pitched connections to be made to an integrated circuit. The interconnect substrate includes a central region on its upper surface for receiving the integrated circuit. The interconnect substrate also has interconnections that electrically connect the finely pitched contacts on the upper surface to larger pitched contacts on the lower surface. The larger pitched contacts connect to a conductive trace frame. The resulting assembly is encased in a molding compound along with a plurality of other devices which are configured to interact with one other through the conductive trace.

REFERENCES:
patent: 5932891 (1999-08-01), Higashi et al.
patent: 7061077 (2006-06-01), Joshi
patent: 7141874 (2006-11-01), Nakatani
patent: 7309913 (2007-12-01), Shim et al.
patent: 2006/0226534 (2006-10-01), Liang et al.
patent: 2008/0290497 (2008-11-01), Sugaya et al.
patent: 05 59847 (1993-08-01), None
International Search Report and Written Opinion of corresponding PCT application (PCT/US2009/036452 filed Mar. 9, 2009) completed Aug. 31, 2009 (total 6 pages).

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