Single wire current sharing control technique for the...

Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...

Reexamination Certificate

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C323S273000, C323S282000, C363S069000, C363S072000

Reexamination Certificate

active

06346798

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of electronics, and, more particularly, to a power supply system.
BACKGROUND OF THE INVENTION
A current sharing technique is often used to upgrade the current delivering capability of a power supply system by adding converter modules. This is done to avoid redesigning the power supply. The modules are in parallel so that the total current delivering capability is nominally the sum of the current capabilities of all the modules.
Parallel operation of the converter modules requires a special control, because, even small differences from the nominal output voltage value can cause considerable unbalancings among modules since their output impedance is intrinsically very small. When reliability of the power supply system is critically important, the special current sharing control is of great help, because, by having more modules operating in parallel than those strictly necessary, each module supplies less current than that nominally deliverable. This reduces electrical and thermal stress.
Moreover, if each module is properly designed, an advantageous redundancy can be introduced in a modular power supply system having such a current sharing control. Single or multiple failure tolerance can be easily achieved by adding one or more reserve modules. For these reasons, the current sharing technique is more often being used in computer power supply systems, especially for high reliability and high end productions.
Desktop and server processors require a stringent regulation of the supply voltage while absorbing currents often exceeding 10-15 A, with an extremely fast current slew rate. In these type conditions, a DC—DC switching converter is commonly required for regulating the supply voltage of the core of the processor. The DC—DC switching converter is often referred to as a voltage regulator module (VRM).
If more processors are present in the same system, as in server applications, it is necessary to have a power supply system of very high reliability capable of ensuring an augmented current delivering capability in case of need. Often, economy and convenience reasons impose implementation of a current sharing control using a single control wire, i.e., by a single control pin of each module.
A single wire current sharing control can be realized using an additional integrated controller dedicated to load sharing functions with respect to a normal DC—DC converter system. Commercially available examples are the devices UC3907 and UC3902, provided by Unitrode. This known approach implies resorting to rather complex techniques to secure stability of the according to this approach, it is necessary to sense the current flowing in the inductor.
In VRM applications, the use of a current sensing resistance is not favorably viewed because of the very high current levels associated to a relatively small output voltage. Any additional voltage drop in series to the output would negatively affect efficiency. Alternative sensing methods of the current flowing through the inductor can be employed, but such methods require additional circuitry.
The commercial device Si9143 provided by Temic Semiconductors, illustrated and described in a document titled “Current Sharing Controller for High Performance Processors” (Rev.B.03-NOV-97), uses a current sharing technique in which the necessary control is implemented with two wires, i.e., two dedicated pins.
Referring to
FIG. 1
, the current sharing is obtained by forcing every module to operate at the same duty-cycle. This is achieved by connecting in common the PWM pins and the SYNC pins of the two illustrated controllers. The SYNCH pins force each controller to start their own duty cycle at the same instant, while the PWM pins set the instant of the duty cycle of all controllers (modules). The current sharing mechanism is based upon matching the resistances of the converters operating in a parallel mode.
Considering the scheme illustrated in
FIG. 2
, exemplifying a so-called buck type synchronous power stage, in which the parasitic resistances of the power switch and of the output inductor are evidenced, the average of the large DC signal of two paralleled converters may be represented by the equivalent scheme of FIG.
3
. Given that the input voltage Vin and the duty cycle D are the same for both converters, the current sharing control loop, as described in the application notes of the commercial devices.
Moreover, it is necessary to duplicate the integration of high performance analog circuitry, such as voltage references and error amplifiers in the main IC containing the power supply controller, as well as in the load sharing function controller IC. This approach is costly in terms of complexity and in integration area requirements.
The so-called droop techniques for implementing a current sharing control are based on a finite value of the converter output resistance. Therefore, it is necessary to sense the output current and the output resistance to secure a sufficiently precise control of the current sharing. This can cause a degradation of the output voltage regulation.
If the output current sensing resistance is relatively large, efficiency losses may become significant. In these cases, an additional amplifying circuit of the current sense signal may be necessary. Although the current sharing technique is relatively straightforward to implement in current mode controlled supplies, distinct current delivering modules should be synchronized among them.
This need reintroduces the necessity of using other dedicated pins. The output of the voltage error amplifier of the principal module or master module (converter) is also coupled with the slave PWM comparators.
Since the output of the voltage error amplifier determines the peak value of the current peak value in the inductor, the current of each module will follow the only driving signal coming from the master module. In this way, current sharing can be implemented with a high degree of precision. Unfortunately, voltage sources V
1
and V
2
have the same value, i.e., D*Vin. Thus, the total load current will flow in each branch depending upon their respective series resistances.
The technique realized in the Si9143 device is relatively easy and low-cost, but it does not satisfy the requirement of realizing a single wire current sharing control, i.e., of engaging only one pin of a converter module.
SUMMARY OF THE INVENTION
The present invention provides a current sharing control technique imolemented through a single wire, that is, by controlling through only one pin of the DC—DC converter modules operating in a PWM mode.
In absence of load transients, only one of the DC—DC converters functioning in parallel with the same duty cycle has a voltage loop active in regulating the output voltage, while the other converters have their voltage regulation loop saturated. This happens because of unavoidable differences among voltage references, and from error amplifier offset of the controllers of the distinct DC—DC converters. In addition, at low frequency the gain of the voltage regulation loop of the converters is extremely high by the presence off an integrating stage in the loop.
It is useless to synchronize the clocks of the controller different from the DC—DC converter modules having a saturated error amplifier. This is because, unavoidably, the duty cycle generated by their PWM modulator would be at a maximum, and would be useless for static regulation. What is strictly necessary to the parallel operation of converter modules is that the PWM signal come from the only converter that has its own voltage control loop being regulated.
According to the present invention, the controller of the DC—DC converter that has the voltage control loop being regulated and has been forcing the highest duty cycle for a sufficiently long time, is allowed to assume the role of master converter. The master thus furnishes its own PWM signal to all the other converters.
Since it is assumed that at least one of the converters has its own voltage loop in regula

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