Single transistor EEPROM memory cell

Details Single transistor EEPROM memory cell Single transistor EEPROM memory cell

1993-03-05

1994-10-18

Fears, Terrell W.

Static information storage and retrieval

Floating gate

Particular biasing

365149, 365182, G11C 1300

Patent

active

053574656

ABSTRACT:
A single-transistor non-volatile memory cell MOS transistor with a floating gate and a control gate using two levels of polysilicon and a tunnel dielectric that overlaps the drain area wherein a tunneling of charge can take place between the drain and the floating gate by means of a system of applied voltages to the control gate and drain.

REFERENCES:
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patent: 4758986 (1988-07-01), Kuo
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patent: 4962481 (1990-10-01), Choi et al.
patent: 4996571 (1991-02-01), Kume et al.
patent: 4996668 (1991-02-01), Paterson et al.
Paper entitled: "A 5-Volt Contactless Array 256KBIT Flash EEPROM Technology" by Texas Instruments, Inc., Copyright date of 1988.

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