Single transistor cell for electrically-erasable programmable re

Static information storage and retrieval – Magnetic bubbles – Guide structure

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357 41, 365185, H01L 2978

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active

048781010

ABSTRACT:
A single transistor EEPROM cell utilizes a tunneling oxide erase mechanism in which the tunneling oxide overlies a portion of the channel region. In addition, an array of single transistor EEPROM cells having a layout which provides convenient byte-at-a-time erase and program operation is disclosed. Two bytes of the array along adjacent rows share a common source, which also forms the source of a pair of erase select transistors, one for each byte. The word lines/control gates of the two bytes form the gates of the two erase select transistors.

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"How Seeq . . . Densities", Electronics, Aug. 21, 1986, 53-56.
B. Cole, "The Exploding Rule in Memory", Electronics, Aug. 21, 1986, 47-52.

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