Single-stage tri-state Schmitt trigger

Details Single-stage tri-state Schmitt trigger Single-stage tri-state Schmitt trigger

2001-11-05

2002-09-10

Ton, My-Trang Nu (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

C327S205000

Reexamination Certificate

active

06448830

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates in general to the field of digital logic inverters, and in particular, to Schmitt trigger inverters. Still more particularly, the present invention relates to a tri-state single-stage Schmitt trigger inverter capable of selectively producing an output of a logical high voltage, a logical low voltage, or a high impedance state.
2. Description of the Related Art
Voltage mode Complementary Metal Oxide Semiconductor (CMOS) Schmitt triggers are used in Very Large Scale Integrated (VLSI) circuit applications to provide hysteresis to the transfer characteristics of a circuit. They restore signal integrity in designs where increased noises from line-to-line capacitance coupling and other noise are present. Schmitt triggers can function as interface receivers, level shifters, wave form reshaping circuits, or simply delay elements. Further Schmitt triggers are often used to transform a signal with a slow or “sloppy” transition into a signal with a sharp transition.
SUMMARY OF THE INVENTION
Often, it is desirable for a Schmitt trigger to simultaneously realize the level-sensitive hysteresis characteristics of a conventional voltage mode Schmitt trigger while also having tri-state output capability. That is, the output may need to be at a logical high voltage, at a logical low voltage, or in a high impedance. For example, an output from a second device may be tied to the voltage output of the Schmitt trigger. If the output of the Schmitt trigger is desired to be electrically isolated, then the output should be in a high impedance state, allowing the second output to define the combined output of the two devices. It would be preferably for such a tri-state Schmitt trigger to be within one circuit stage to accommodate signal inversion logic requirements, performance requirements, requirements to have one less level of signal inversion in a critical timing path, or power considerations for avoiding unnecessary switching activities and reduced transitional power consumption when data need not be passed through.
The present invention addresses a need for a Schmitt trigger having three outputs states with the above described characteristics. In its preferred embodiment, the present invention is a tri-state Schmitt trigger inverting circuit having multiple tri-state controller switching devices connected to either a high voltage rail or a low voltage rail. When the enabling signal to the tri-state controller switching devices is set to a first level, the Schmitt trigger functions as a standard logic inverter. When the complementary enabling signal is received at the tri-state controller switching devices, the connections to the high voltage rail and low voltage rail of the Schmitt trigger are turned off, and the output of the Schmitt trigger is in a high impedance state. In the preferred embodiment, the device is a single stage tri-state Schmitt inverter having optimal hysteresis characteristics consistent with those of a conventional voltage mode Schmitt trigger, while having a tri-state output with minimal power consumption. The preferred embodiment of the invention has no more than three switching devices between the voltage output and a high or low voltage rail. Further, when the inventive tri-state Schmitt trigger is in a state where the output is in a high impedance state, unnecessary switching activities in the switching devices are eliminated.
The above, as well as additional objectives, features, and advantages in the present invention will become apparent in the following detailed written description.


REFERENCES:
patent: 4539489 (1985-09-01), Vaughn
patent: 5341033 (1994-08-01), Koker
patent: 5886556 (1999-03-01), Ganger et al.
patent: 5945859 (1999-08-01), Pang
patent: 6046617 (2000-04-01), Hoeld
patent: 6060925 (2000-05-01), Chou
patent: 6127898 (2000-10-01), Naura
IBM Corporation, “PD/SOI CMOS Schmitt Trigger Circuits with Controllable Hysteresis”, J.B. Kuang and C.T. Chuang, p. 1-4.

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