Single-stage and multi-stage low power interconnect...

Coded data generation or conversion – Digital code to digital code converters – To or from bit count codes

Reexamination Certificate

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C341S050000, C326S082000

Reexamination Certificate

active

11314236

ABSTRACT:
An interconnect architecture is provided to reduce power consumption. A first driver may drive signals on a first interconnect and a second driver may drive signals on a second interconnect. The first driver may be powered by a first voltage and the second driver may be powered by a second voltage different than the first voltage.

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