Single silicon-on-insulator (SOI) wafer accelerometer...

Details Single silicon-on-insulator (SOI) wafer accelerometer... Single silicon-on-insulator (SOI) wafer accelerometer...

2009-03-11

2011-11-15

Tran, Binh X (Department: 1713)

Etching a substrate: processes

Masking of a substrate using material resistant to an etchant

C216S074000, C216S080000, C216S099000, C438S712000, C438S739000, C438S753000

Reexamination Certificate

active

08057690

ABSTRACT:
Methods for creating at least one micro-electromechanical (MEMS) structure in a silicon-on-insulator (SOI) wafer. The SOI wafer with an extra layer of oxide is etched according to a predefined pattern. A layer of oxide is deposited over exposed surfaces. An etchant selectively removes the oxide to expose the SOI wafer substrate. A portion of the SOI substrate under at least one MEMS structure is removed, thereby releasing the MEMS structure to be used in the formation of an accelerometer.

REFERENCES:
patent: 6916728 (2005-07-01), Gogoi et al.
patent: 2005/0280106 (2005-12-01), Kim et al.
patent: 2006/0278942 (2006-12-01), Rubel
patent: 2006/0281214 (2006-12-01), Chilcott
patent: 2007/0266787 (2007-11-01), LaFond et al.

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