Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2005-11-01
2005-11-01
Phan, Trong (Department: 2827)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S222000, C365S233100
Reexamination Certificate
active
06961281
ABSTRACT:
A memory module for use in a two rank memory module system includes a plurality of memory devices and a control circuit. In one embodiment, the control circuit may be configured to generate a chip select signal that is provided to each of the memory devices. The chip select signal may be dependent upon assertions of a first bank chip select signal and a second bank chip select signal received from a memory controller. The control circuit may be further configured to generate an address signal that is provided to each of the memory devices. The address signal may be asserted dependent upon which of the first bank chip select signal and the second bank chip select signal are asserted.
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Duncan Neil N.
Fang Clement C.
Jeffrey David J.
Wong Tayung
Curran Stephen J.
Kivlin B. Noäl
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Phan Trong
Sun Microsystems Inc.
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