Single-poly EPROM cell that utilizes a reduced programming volta

Details Single-poly EPROM cell that utilizes a reduced programming volta Single-poly EPROM cell that utilizes a reduced programming volta

1997-02-07

1998-06-02

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

36518501, 36518514, 257314, G11C 1134

Patent

active

057611262

ABSTRACT:
The layout and the programming voltage of a single-poly EPROM cell are reduced by eliminating the n+ contact region which is conventionally utilized to place a positive voltage on the n-well of the cell, and by utilizing a negative voltage to program the cell. The negative voltage is applied to a p+ contact region formed in the n-well which injects electrons directly onto the floating gate of the cell.

REFERENCES:
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patent: 5515319 (1996-05-01), Smayling et al.
patent: 5612913 (1997-03-01), Cappelletti et al.
Ohnakado, T., et al., "Novel Electron Injection Method Using Band-to-Band Tunneling Induced Hot Electron (BBHE) for Flash Memory with a P-channel Cell," IEDM 1995, pp. 279-282.
Chan, T.Y. et al., "The Impact of Gate-Induced Drain Leakage Current on MOSFET Scaling," IEDM, 1987, 4 pages.

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