Excavating
Patent
1997-04-29
1998-11-10
Nguyen, Hoa T.
Excavating
371 221, G01R 3128
Patent
active
058355065
ABSTRACT:
An integrated circuit tester includes a set of pin electronics circuits, each for carrying out a sequence of activities at a separate terminal of a device under test (DUT) in response to an input vector sequence. Such activities may include sending a test signal to the DUT terminal or ascertaining the state of a DUT output signal at the terminal. Each pin electronics circuit can operate in either of two modes, normal and doublet. The test is organized into a set of successive test cycles. When operating in the normal mode, a pin electronics circuit interprets each successive input vector as defining activities to be carried out during a single cycle of the test. When operating in the doublet mode, a pin electronics circuit interprets each successive input vector as defining activities to be carried out during two successive test cycles.
REFERENCES:
patent: 4682330 (1987-07-01), Millham
patent: 5381421 (1995-01-01), Dickol et al.
patent: 5617431 (1997-04-01), Tupuri et al.
Credence Systems Corporation
Nguyen Hoa T.
LandOfFree
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