Static information storage and retrieval – Addressing – Plural blocks or banks
Patent
1998-12-09
2000-09-19
Zarabian, A.
Static information storage and retrieval
Addressing
Plural blocks or banks
365 63, G11C 800
Patent
active
06122216&
ABSTRACT:
A dual function memory device having a RAM array and a ROM array contained in a single integrated circuit package. Preferably the RAM cells are static RAM cells, and the ROM cells are flash ROM. Either the RAM cells or the ROM cells, but not both, can be accessed during a single memory transaction. The memory device includes a ROM select signal that determines selects the operating mode for the memory. When the ROM select is asserted, the ROM cells can be accessed so that the memory device operates as a ROM. When the ROM select signal is deasserted, the RAM cells can be accessed so that the memory device operates as a RAM. The RAM and ROM arrays connect to a common address bus and thus occupy separate address spaces. The RAM and ROM arrays also connect to a common data bus and may share a plurality of control signals.
REFERENCES:
patent: 3753242 (1973-08-01), Townsend
patent: 4004286 (1977-01-01), Mrazek
patent: 4095281 (1978-06-01), Denes
patent: 4149268 (1979-04-01), Waters
patent: 4175290 (1979-11-01), Harari
patent: 4207615 (1980-06-01), Mar
patent: 4418401 (1983-11-01), Bansal
patent: 4485457 (1984-11-01), Balaska et al.
patent: 4575819 (1986-03-01), Amin
patent: 4584669 (1986-04-01), Moynihan et al.
patent: 4601031 (1986-07-01), Walker et al.
patent: 4610000 (1986-09-01), Lee
patent: 4638465 (1987-01-01), Rosini et al.
patent: 4855803 (1989-08-01), Azumai et al.
patent: 4897813 (1990-01-01), Kumbasar
patent: 4942516 (1990-07-01), Hyatt
patent: 4995004 (1991-02-01), Lee
patent: 5014982 (1991-05-01), Okada et al.
patent: 5138598 (1992-08-01), Sako et al.
patent: 5581505 (1996-12-01), Lee
patent: 5687346 (1997-11-01), Shinohara
patent: 5710934 (1998-01-01), Bona et al.
patent: 5715232 (1998-02-01), Chikazawa et al.
Microelectronic Circuits, Third Edition, 1991, Saunders College Publishing, Harcourt Brace College Publishers, pp. 956-970.
SmartVoltage Boot Block Flash Memory Family, Intel.RTM., A28F400BR-T/B, R-MBIT (256K X 16, 512K X 8), Dec. 1996.
Compaq Computer Corporation
Harris Jonathan M.
Heim Michael F.
Zarabian A.
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