Cleaning and liquid contact with solids – Processes – Including application of electrical radiant or wave energy...
Reexamination Certificate
2000-06-29
2001-05-15
Carrillo, Sharidan (Department: 1746)
Cleaning and liquid contact with solids
Processes
Including application of electrical radiant or wave energy...
C134S002000, C134S003000, C134S026000, C134S027000, C134S028000, C134S029000, C134S036000, C134S041000, C134S902000
Reexamination Certificate
active
06230720
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to the cleaning of semiconductors, and more particularly to the cleaning of semiconductor (e.g., silicon) wafers after final polishing.
The manufacture of semiconductor wafers requires numerous processing operations including growing an ingot, slicing, lapping, grinding, etching, polishing and cleaning. The final polishing operation reduces the surface roughness of the wafer to a level acceptable for semiconductor device manufacturers (e.g., about 0.02 nm to about 0.5 nm based upon Atomic Force Microscopy of a 10 &mgr;m×10 &mgr;m field of view) while it increases the total thickness variation of the wafer by about 0.1 to about 1.5 &mgr;m (e.g., current detection limits are about 0.01 &mgr;m, for conventional capacitance measuring devices such as the ADE 7200 or ADE 9600), and it deposits contaminants such as particulate matter (e.g., silica polishing media), foreign metals (e.g., iron, zinc and aluminum), and organic compounds on the wafer surface. For example, a typical polished 200 mm wafer is estimated to have approximately 1 to 3 million particles exceeding about 0.2 &mgr;m in diameter on the surface. The foregoing particle count is an estimate because the extent of particle contamination after polishing is so great that conventional laser scanning counting devices such as the Tencor 6200, ADE CR80 or ADE CR81 cannot accurately determine counts above about 20,000 particles per wafer. A typical polished wafer also has about 1×10
15
metal atoms/cm
2
(as determined, for example, by Acid Drop Inductive Coupled Plasma Mass Spectroscopy), and at least about 5×10
15
organic carbon atoms/cm
2
(determined, for example, by Gas Chromatography/Atomic Emission Spectroscopy).
Current specifications for a Grade 1 wafer typically require that it have a concentration of contaminant particles exceeding 0.2 &mgr;m in diameter adsorbed to the wafer surface no greater than about 0.06 to about 0.16 particles/cm
2
(e.g., the front of a 200 mm diameter Grade 1 wafer has no more than about 50 particles exceeding about 0.2 &mgr;m in diameter); no more than about 1×10
10
metal atoms/cm
2
; and no more than about 1×10
14
organic carbon atoms/cm
2
. To achieve these target concentrations, therefore, the wafer must be subjected to a cleaning method with numerous cleaning methods being known in the art to reduce the concentration of surface contaminants (e.g., RCA cleaning, Piranha-RCA cleaning, megasonic and ultrasonic cleaning, scrubbing and acid etching).
To adequately clean the surface of a polished semiconductor wafer such that it is substantially free of contaminants (i.e., contamination no greater than the levels corresponding to a Grade 1 wafer), conventional manufacturing methods typically involve at least two cleaning operations after final polishing: a first post-polish cleaning operation followed by a final cleaning operation with the wafer being dried as the last step in the post-polish operation. During the post-polish cleaning operation which may, for example, comprise 10 or more steps (e.g., alkaline cleaning steps such as SC-1, acid cleaning steps such as hydrofluoric acid or SC-2, deionized water rinsing steps, and drying steps), the particle count on the front surface of a polished 200 mm wafer may be reduced to about 50 to about 3000 particles exceeding about 0.2 &mgr;m in diameter. During the final cleaning operation which may, for example, comprise another 10 or more steps (e.g., alkaline cleaning steps such as SC-1, acid cleaning steps such as hydrofluoric acid or SC-2, deionized water rinsing steps, and drying steps) the particle count on the front surface of a polished 200 mm wafer may be further reduced to about 15 or fewer particles exceeding about 0.2 &mgr;m in diameter.
Cleaning methods constitute a significant manufacturing cost. The major expenses associated with cleaning processes include capital expenditures for the cleaning and drying equipment and associated plumbing, heating and cooling equipment, robotic wafer handling apparatus, computerized control equipment, apparatus for storing and disposing of cleaning solutions, and the clean room space required for the apparatus. In addition, there is the cost of the cleaning solutions, high purity water and cost of heating and cooling and filtering the solutions, as well as the cost of storing and disposing of them. In view of environmental concerns and regulations, the cost of disposal of certain materials can be greater than the cost of the material being discarded. Additionally, because conventional post-polish cleaning methods are multi-operational in nature, many of the above expenses are further increased.
In view of the foregoing, a need continues to exist for a more efficient and economic method for polished wafers resulting in the surface being substantially free of contaminants. Such a process would reduce the manufacturing costs associated with the final cleaning of semiconductor wafers. In addition, such a process would decrease the amount of waste product emitted into the environment.
SUMMARY OF THE INVENTION
Among the several objects and features of the present invention may be noted the provision of method which reduces the final cleaning of a semiconductor wafer to a single operation; the provision of such a method which yields a semiconductor wafer surface substantially free of contaminants; the provision of such a method which prevents back-ups in the manufacturing process; the provision of such a method wherein manufacturing costs including capital expenditures and raw material expenditures are reduced; the provision of such a method wherein the amount of occupied manufacturing floor space is reduced; the provision of such a method wherein the time required for final cleaning is reduced; and the provision of such a method wherein the amount of waste which must be discarded is reduced.
Generally, the present invention is directed to a process for cleaning a polished silicon wafer. The starting polished wafer for this process will have a surface roughness less than about 0.5 nm, a total thickness variation less than about 3 &mgr;m, a surface concentration of contaminant particles exceeding about 0.2 &mgr;m in diameter adsorbed to the wafer surface greater than about 100 particles/cm
2
, a surface concentration of foreign metals greater than about 1×10
15
atoms/cm
2
, and a surface concentration of organic compounds greater than about 1×10
14
carbon atoms/cm
2
. The process comprises:
(a) contacting the polished wafer with an aqueous solution comprising an oxidizing agent to oxidize organic carbon on the surface of the wafer,
(b) after step (a), immersing the polished wafer in an alkaline cleaning solution in the presence of a megasonic field to reduce the surface concentration of contaminant particles exceeding 0.2 &mgr;m in diameter,
(c) withdrawing the polished wafer from the alkaline cleaning solution and rinsing it with deionized water,
(d) after step (c), immersing the polished wafer in an acidic cleaning solution to reduce the surface concentration of contaminant metal atoms,
(e) withdrawing the polished wafer from the acidic cleaning solution and immersing it in an aqueous bath comprising ozone, and
(f) after step (e), drying the polished wafer, the dried polished wafer having a surface roughness less than about 0.5 nm, a total thickness variation less than about 2 &mgr;m, a surface concentration of contaminant particles less than about 0.06 to about 0.16 particles/cm
2
, a surface concentration of foreign metals less than about 1×10
10
atoms/cm
2
, and a surface concentration of organic compounds less than about 1×10
14
carbon atoms/cm
2
, the process being further characterized by the absence of a step in which the surface of the polished wafer is dried between steps (a) and (e).
Other objects and features of the present invention will be in part apparent and in part pointed out hereinafter.
REFERENCES:
patent: 4050954 (1977-09-01), Basi
patent: 5516730 (1996-05-01)
Myli Kari B.
Shive Larry W.
Yalamanchili M. Rao
Carrillo Sharidan
MEMC Electronic Materials , Inc.
Senniger Powers Leavitt & Roedel
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