Single loop frequency synthesizer with direct digital synthesis

Details Single loop frequency synthesizer with direct digital synthesis Single loop frequency synthesizer with direct digital synthesis

1994-12-28

1996-04-16

Mis, David

Oscillators

Automatic frequency stabilization using a phase or frequency...

Tuning compensation

331 18, 331 17, 331 14, 455260, 327105, 327156, H03L 708, H03L 716, H03L 718

Patent

active

055086594

ABSTRACT:
A frequency synthesizer with very short acquisition times. With a single loop there is associated a direct digital synthesizer whose signal is injected into the loop by means of a mixer. The adjustment of the loop is done on Np.Fr and the adjustment of the digital synthesis is done on (Ns+)Fr with Np, Ns, K and M as integers, Np being greater than Ns, 0.ltoreq.K<M, M as a fixed value and where Fr is a reference frequency. The mixture makes it possible to obtain, as a synthesis frequency, (Ns+Np+)Fr. The acquisition time of the digital synthesis is negligible and that of the loop is greatly reduced since it synthesizes steps that are multiples of Fr and not of as with a standard single loop.

REFERENCES:
patent: 4464638 (1984-08-01), Crowley et al.
patent: 4882549 (1989-11-01), Galani et al.
patent: 5015971 (1991-05-01), Taylor et al.
patent: 5019790 (1991-05-01), Kapetanic
patent: 5023572 (1991-06-01), Caldwell et al.
patent: 5184093 (1993-02-01), Itoh et al.
Thomas J. Endres, et al., "Induced End-of-Life Errors in a Fast Settling PLL", 1993 IEEE International Frequency Control Symposium, 1993, pp. 261-269.

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