Single horizontal scan range CRT monitor

Details Single horizontal scan range CRT monitor Single horizontal scan range CRT monitor

1999-10-21

2001-11-06

Brier, Jeffery (Department: 2672)

Computer graphics processing and selective visual display system

Plural display systems

Diverse systems

C348S441000

Reexamination Certificate

active

06313813

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to computer monitors and, more particularly, to a single horizontal scan range cathode ray tube (CRT) monitor for use with personal computers having differing output display signal formats.
There is little standardization among personal computer (PC) manufacturers for the resolution and frequency of the display signals generated by the display cards of the PCs. On the other hand, it is generally more expensive and complicated to make analog monitors which can adapt to a plurality of display signal frequencies. One such possible arrangement is shown in FIG.
1
. In this arrangement a PC
10
includes a display card (not shown) having a digital to analog (D/A) converter
12
to output analog display signals, at a frequency and resolution set by the PC, to a CRT multiple scanning frequency monitor
14
. The monitor
14
has to detect the frequency and adjust its scanning frequency to match that of the initial display signals. Such a monitor is complex and expensive to build.
Still another possible monitor display arrangement is illustrated in FIG.
2
. Again the PC
10
includes a display card (not shown) having a digital to analog (D/A) converter
12
to output analog display signals, at a frequency and resolution set by the PC, to a single scan frequency liquid crystal display (LCD) monitor
16
.
The LCD monitor
16
includes an A/D converter
18
that converts the received analog signals into digital signals. A scaling engine
20
within the LCD monitor
16
converts the digital display signals into a frequency and resolution that are compatible with the LCD monitor
16
and supplies them to a display circuit (not shown) within the LCD monitor
16
. In this arrangement, the A/D converter and the LCD panel are expensive.
Yet another possible arrangement is illustrated in FIG.
3
. In this arrangement the PC
10
includes a display card (not shown) having a digital to analog (D/A) converter
12
to output analog display signals, at a frequency and resolution set by the PC, to an A/D converter
24
of a single scan CRT monitor
22
. The output of the A/D converter
24
is supplied to a scaling engine
26
that converts the digital display signals into a frequency and resolution that are compatible with the CRT monitor
22
and supplies them to a D/A converter
28
. The analog output display signals of the D/A converter
28
are supplied to the monitor
22
for display at a resolution and frequency compatible with the monitor. The disadvantages of this arrangement are also that it is complex to manufacture and expensive.
Lastly, in the possible arrangement of
FIG. 4
, a PC
30
having an internal scaling engine
32
outputs digital display signals at a resolution and frequency compatible with a single scan LCD monitor
16
. While this arrangement has the advantage of a lower cost host, the LCD panel is still expensive for general use, e.g. in desktop PCs.
What is needed is a single horizontal scan range monitor, preferably a CRT monitor, that is inexpensive, not complex to make, and allows the monitor to be compatible with PCs having display circuits that output display signals at a variety of different scanning frequencies and display resolutions.
SUMMARY OF THE INVENTION
The above and other objectives are obtained by the present invention of a single horizontal scan range monitor that accepts display signals in a digital format from an external source, such as a personal computer. The initial display signals can have one of a plurality of input resolutions and scanning frequencies. A converter supplied with the initial display signals detects the particular input resolution of the initial display signals and converts them to digital output signals having a vertical output resolution selected from a plurality of different output resolutions matched to the detected input resolution of the initial display signals and a horizontal scanning frequency that is the same as the horizontal scanning frequency of the monitor.
Preferably the monitor is a cathode ray tube (CRT) monitor. In some embodiments, the initial display signals are converted to output signals having a single predetermined horizontal resolution, regardless of the horizontal resolution of the initial display signals. In one preferred embodiment, the converter is an integrated circuit chip.
The monitor includes a display data input for receiving the initial display data. This display data input can be a receiver where the external source transmits the initial display data in the digital format. In some preferred embodiment, the converter is a circuit that includes a frame memory. The display signal conversion is accomplished by controlling the data writing and reading rates to the frame memory. The converter includes, in addition to the frame memory, a resolution detector for detecting the resolution of the initial display signals and outputting a resolution detection signal and a first multiplexer connected between the display data input, the frame memory, and the monitor for switching between writing the initial display signals into the frame memory and reading the digital output signals out of the frame memory to the monitor. An address counter controller controls the addresses at which data are written into the frame memory and read out from the frame memory. A vertical sync generator connected to the resolution detector generates a vertical sync pulse for the monitor at a selected one of a plurality of vertical sync frequencies as a function of the detected resolution of the initial display signals. A horizontal sync generator generates a horizontal sync pulse at the single horizontal scanning frequency of the monitor. A data output clock generator generates a data output clock signal as a product of the single horizontal scanning frequency and a multiplier factor equal to the sum of the horizontal output resolution and a horizontal blanking interval.
A second multiplexer receives from the display data input a clock and a vertical sync signal. The second multiplexer is connected to the address counter, the data output clock signal generator, and the horizontal sync generator for selectively supplying to the address counter controller either the combination of the vertical sync signal and the clock from the display data input or the combination of the data output clock signal from the data output clock generator and the horizontal sync pulse from the horizontal sync generator. A sector controller controls the first multiplexer and the second multiplexer to synchronously and alternately write the initial display data to the frame memory at initial resolutions and scanning frequencies and read the digital output data signals from the frame memory to the monitor at resolutions and scanning frequencies that are compatible with the monitor.
In embodiments where the converter resides in the monitor, it is preferable to have the display signals transmitted by the PC to the monitor in digital form. A receiver is incorporated as part of the display data input of the monitor and receives the digital display signals and forwards them to the converter. In the preferred embodiments, the receiver is one of a transition-minimized differential scaling (TMDS) receiver, a low voltage differential signaling (LVDS) receiver, a low voltage differential signaling display interface (LDI) receiver, and a gigabit video interface (GVIF) receiver.
In one preferred embodiment wherein the receiver is a TMDS receiver, the clock from the receiver is a transition minimized differential scaling (TMDS) clock signal. The horizontal sync generator includes a phase locked loop (PLL) circuit for generating the data output clock. In the preferred embodiment, the horizontal sync generator generates horizontal sync pulses at a frequency of 80 kHz. The vertical sync generator generates vertical sync pulses at a selected one of the following frequencies in correspondence with the resolution detection signal: 79.9 Hz, 95.1 Hz, 124.8 Hz, 98.9 Hz, 88.4 Hz, and 75.1 Hz.
The converters of some of the above-discus

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