Single-gate non-volatile memory and operation method thereof

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185280, C365S185290, C257S316000, C257S318000

Reexamination Certificate

active

07423903

ABSTRACT:
A single-gate non-volatile memory and an operation method thereof, wherein a transistor and a capacitor structure are embedded in a semiconductor substrate; the transistor comprises: a first electrically-conductive gate, a first dielectric layer, and multiple ion-doped regions; the capacitor structure comprises: a second electrically-conductive gate, a second dielectric layer, and a second on-doped region; the first electrically-conductive gate and the second electrically-conductive gate are interconnected to form a single floating gate of a memory cell; a reverse bias is used to implement the reading, writing, and erasing operations of the single-floating-gate memory cell; in the operation of a single-gate non-volatile memory with an isolation well, positive and negative voltages are applied to the drain, the gate, and the silicon substrate/the isolation well to create an inversion layer so that the absolute voltage, the area of the voltage booster circuit, and the current consumption can be reduced.

REFERENCES:
patent: 6545311 (2003-04-01), Shukuri et al.
patent: 7099192 (2006-08-01), Wang et al.

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