Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
2000-03-30
2001-10-02
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S067000, C365S203000
Reexamination Certificate
active
06297670
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a single-ended sense amplifier for sensing a state of a bitline in a read-only memory or a register file. More particularly, the present invention relates to a single-ended sense amplifier with a noise margin circuit for providing an adjustable noise margin and a power down control circuit for reducing static power dissipation.
BACKGROUND OF THE INVENTION
A single-ended sense amplifier is typically designed to sense a state of a bitline in a read-only memory or a register file. For example, the read-only memory usually includes a plurality of memory cells arranged in a form of matrix. Each memory cell is coupled to a wordline node and a bitline node, respectively. If the memory cell contains a transistor, the voltage of the bitline node drops toward ground when an input voltage is applied to the wordline node to turn on the transistor.
A conventional sense amplifier for indicating the change of the voltage at the bitline node is shown in FIG.
1
. Referring to
FIG. 1
, the conventional sense amplifier includes an output circuit
1
, a precharge circuit
2
, and a discharge circuit
3
. The output circuit
1
has a data node
4
as the input terminal. The data node
4
is coupled to the precharge circuit
2
and the discharge circuit
3
.
The discharge circuit
3
includes an n-channel transistor M
6
and an inverter INV
0
. The inverter INV
0
has its input coupled to the bitline node
5
and its output coupled to the gate electrode of the n-channel transistor M
6
at the reference node NR. Therefore, the decrease in the voltage level of the bitline node
5
results in the rapid increase of the gate-source voltage of the n-channel transistor M
6
.
For the output circuit
1
, an inverter INV
1
senses the state of the data node
4
. If the voltage of the data node
4
drops below a threshold voltage for the inverter INV
1
, the inverter INV
1
outputs a logic high. If the voltage of the data node
4
remains above the threshold voltage, the inverter INV
1
outputs a logic low. This logic low level turns a p-channel transistor M
7
on such that the voltage of the data node
4
remains at or near an external constant voltage source Vcc. In addition, an inverter INV
2
is coupled to receive the output of the inverter INV
1
, and then generates inverted signal as the output voltage V
out
.
The precharge circuit
2
includes a p-channel transistor M
5
having a source electrode connected to the external constant voltage source Vcc, a drain electrode coupled to the data node
4
, and a gate electrode for receiving a precharge signal
6
.
The conventional sense amplifier has two modes of operation: precharge and sense modes. During the precharge mode, the precharge signal
6
is low such that the p-channel transistor M
5
is turned on. The bitline node
5
is precharged toward an intermediate voltage level between ground and Vcc through the transistors M
5
and M
6
until the n-channel transistor M
6
is turned off. On the other hand, when the precharge signal
6
is high, the sense amplifier is operated in the sense mode with the non-conductive p-channel transistor M
5
. If the bitline node
5
is pulled low slightly, the voltage level at the reference node NR will move higher, turning on the n-channel transistor M
6
. As the bitline node
5
is pulled further down, the n-channel transistor M
6
is turned on harder and pulls the voltage of the data node
4
low. Since the n-channel If transistor M
6
is biased at the edge of conduction after the precharge operation mode, the sensing speed of the sense amplifier can be very fast.
However, the noise immunity of the conventional sense amplifier is very poor. Any low-going noise on the bitline node
5
can trigger the sense amplifier. This is due to the fact that the gate-source voltage of the n-channel transistor M
6
is just at the edge of the threshold voltage.
As a solution to the noise immunity problem, the sense amplifier with an additional precharge circuit has been disclosed in U.S. Pat. No. 5,495,191, as shown in FIG.
2
. Referring to
FIG. 2
, compared with the above-mentioned sense amplifier shown in
FIG. 1
, the sense amplifier described in U.S. Pat. No. 5,495,191 further comprises a noise margin circuit
7
coupled to the bitline node
5
and controlled by the precharge signal
6
. The noise margin circuit
7
includes a p-channel transistor M
15
, an n-channel transistor M
16
, and an inverter INV
3
as an additional precharge path. The inverter INV
3
is preferably different from the inverter INV
0
such that the voltage at a reference node NR
1
is higher than the voltage at the reference node NR when the identical bitline voltage is used as the input to both inverters INV
0
and INV
3
. In this manner, the n-channel transistor M
16
remains on for a while after the n-channel transistor M
6
switches off, and the bitline node
5
, therefore, is charged higher to provide a noise margin.
However, the conventional sense amplifier disclosed in U.S. Pat. No. 5,495,191 has two disadvantages. On one hand, due to the arrangement of the noise margin circuit
7
, the sense amplifier disclosed in U.S. Pat. No. 5,495,191 occupies an larger area on a semiconductor wafer resulting in the decrease of semiconductor device integration. On the other hand, the inverters INV
0
and INV
3
both consume static power if the bitline node
5
is not pulled down to ground. Therefore, the static power dissipation is significantly large.
SUMMARY OF THE INVENTION
In view of the disadvantages of the conventional single-ended sense amplifier, it is therefore an object of the present invention to provide a novel single-ended sense amplifier in which the noise margin is improved through using fewer circuit elements, thereby maximizing the integration degree on the semiconductor wafer.
It is another object of the present invention to provide a novel single-ended noise margin circuit, thereby providing an adjustable noise margin and reducing the static power consumption.
It is still another object of the present invention to provide a novel single-ended sense amplifier in which a power down control circuit is provided, thereby further reducing the static power consumption.
According to the present invention, a single-ended sense amplifier comprises an output circuit having an output terminal for indicating a state of a bitline in a read-only memory. A precharge circuit is coupled to an input terminal of the output circuit for charging the input terminal in response to a lower voltage level of a precharge signal. In addition, a noise margin circuit is coupled to the bitline node for outputting a reference voltage by inverting the voltage of the bitline node. Moreover, an n-channel transistor has a gate electrode coupled to receive the reference voltage for coupling the input terminal of the output circuit to the bitline node when the reference voltage exceeds a threshold voltage of the n-channel transistor.
The noise margin circuit has a larger logic-threshold voltage in response to the lower voltage level of the precharge signal and a smaller logic-threshold voltage in response to a higher voltage level of the precharge signal. The difference between the two logic-threshold voltages represents a possible noise margin.
Furthermore, the single-ended sense transistor according to the present invention comprises a power down control circuit coupled to the bitline node for reducing the static power consumption.
REFERENCES:
patent: 5495191 (1996-02-01), Lev et al.
patent: 5619149 (1997-04-01), Lev et al.
patent: 5689200 (1997-11-01), Ting et al.
patent: 5748015 (1998-05-01), Tam
patent: 5909394 (1999-06-01), Chou
Chao Chin-Chieh
Tso Keh-Yung
Yang Tsen-Shau
Century Semiconductor, Inc.
Cunningham Terry D.
Darby & Darby
Nguyen Long
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