Single delay line adjustable duty cycle clock generator

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Rectangular or pulse waveform width control

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H03K 504

Patent

active

055504990

ABSTRACT:
An adjustable duty cycle clock generator is disclosed having a single delay line cascaded to a multiplexer and first and second edge detectors which respectively drive set and reset inputs on a S-R latch to produce an adjustable duty cycle clock signal.

REFERENCES:
patent: 4857760 (1989-08-01), Stuebing
patent: 4870299 (1989-09-01), Chen
patent: 4965524 (1990-10-01), Patchen
patent: 4970418 (1990-11-01), Masterson
patent: 4985640 (1991-01-01), Grochowski et al.
patent: 5103114 (1992-04-01), Fitch
patent: 5317202 (1994-05-01), Waizman
patent: 5336939 (1994-08-01), Eitrheim et al.
patent: 5359232 (1994-10-01), Eitrheim et al.
patent: 5448192 (1995-09-01), Van De Wiel

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