Single-crystal layer on a dielectric layer

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Non-single crystal – or recrystallized – material forms active...

Reexamination Certificate

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C257S064000, C257S075000, C257SE21379, C438S166000

Reexamination Certificate

active

07547914

ABSTRACT:
The process relates to the production of a layer of a single-crystal first material on a second material. The second material has at least one aperture exposing a surface portion of a single-crystal third material. The process generally includes forming an at least partially crystalline first layer of said first material on said surface portion of the third material. Then, an amorphous or partially crystalline second layer of the first material is formed on the at least partially crystalline first layer of the first material and on one part of the second material that is around said aperture. Finally, the process includes recrystallization annealing of the first material. Thus, it is possible to produce, within one and the same wafer, either transistors on a germanium-on-insulator substrate with transistors on a silicon-on-insulator substrate, or transistors on a germanium-on-insulator substrate with transistors on a silicon substrate.

REFERENCES:
patent: 5976959 (1999-11-01), Huang
patent: 6537370 (2003-03-01), Hernandez et al.
patent: 2004/0157412 (2004-08-01), Seifert
patent: 2005/0054180 (2005-03-01), Han et al.
patent: 2005/0136566 (2005-06-01), Morse
Min-Lin Cheng et al., “Selective Ge CVD as a Via Hole Filling Method and Self-Aligned Impurity Diffusion Microsource in Si Processing,” Japanese Journal of Applied Physics, Tokyo, Japan, vol. 28, No. 11, Part 2, Nov. 1, 1989, pp. L2054-L2056.

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