1995-08-24
1997-01-21
Canney, Vincent P.
Excavating
39518306, G01R 3128
Patent
active
055965849
ABSTRACT:
A half-latch for a scan latch is described. The half-latch has an input terminal for receiving an input signal a first control terminal for receiving a clock signal and an output terminal. When enabled, the half-latch adopts a data transfer state in which it transmits a signal from its input terminal to its output terminal. Alternatively, the half-latch can adopt a data holding state in which a signal is stored on the output terminal, these states being selected in dependence on the state of the clock signal. The half-latch described herein has a second control terminal which receives the control signal to selectively disable the half-latch. This allows a common clock signal to be used when a scan latch is constructed using these half-latches.
REFERENCES:
patent: 4742293 (1988-05-01), Koo et al.
patent: 5015875 (1991-05-01), Giles et al.
patent: 5130568 (1992-07-01), Miller et al.
patent: 5528610 (1996-06-01), Edler et al.
Standard Search Report dated Nov. 22, 1994.
Canney Vincent P.
Driscoll David M.
Morris James H.
SGS-Thomson Microelectronics Limited
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