Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal
Patent
1992-08-03
1998-10-06
Vo, Don N.
Pulse or digital communications
Bandwidth reduction or expansion
Television or motion video signal
375377, 360 49, 365 49, 341106, H04B 166
Patent
active
058188738
ABSTRACT:
A single clock cycle adaptive data compressor/decompressor with a string reversal mechanism is described which can perform data compression and decompression at the rate of one uncompressed symbol per clock cycle. The LZW data compression algorithm has been improved for use in this data compressor. The compressor builds a string table as the data is received. Each string within the table is made up of the address within the table of the longest previously seen matching string and the one character that makes this string different. This data compressor/decompressor utilizes a content addressable memory to store the string table. This content addressable memory allows the compressor to store the current symbol string in a table while that same string table is simultaneously searched for the current string. During decompression the characters within a symbol string are output in reverse of the order in which they were input. In order for the data to be restored to its original format the characters within a string must be reversed before they are output. Two dual-ported random-access memories are used as circular queues to perform this string reversal. These dual-ported random-access memories have the capability to output the characters within a string from the string reversal mechanism in the order that they were input. The first dual-ported random access memory is used to store the strings of symbols to be reversed and the second dual-ported random access memory is used to store the addresses of the first and last symbol of each string that is stored in the first dual-ported random-access memory.
REFERENCES:
patent: 3714439 (1973-01-01), Williams et al.
patent: 4558302 (1985-12-01), Welch
patent: 5142676 (1992-08-01), Fried et al.
patent: 5214626 (1993-05-01), Satoh et al.
patent: 5485526 (1996-01-01), Tobin
T. Welch, "A Technique for High-Performance Data Compression," IEEE Computer, Jun., 1984.
J. Ziv and A. Lempel, "Compression of Individual Sequences via Variable-Rate Coding," IEEE Trans. on Inf. Thy., vol. IT-24, No. 5, Sep., 1978.
Wall Robert Lyle
Winters Kel D.
Advanced Hardware Architectures, Inc.
Vo Don N.
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