Single clock CMOS logic circuit with selected threshold voltages

Details Single clock CMOS logic circuit with selected threshold voltages Single clock CMOS logic circuit with selected threshold voltages

1978-12-21

1981-02-10

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307221C, 307279, H03K 1908, G11C 1928

Patent

active

042504066

ABSTRACT:
A CMOS logic circuit having a basic CMOS shift register useful as a shift register or in sequential logic circuits is provided. The circuit has two inverters plus an output inverter and two transistors which are enabled by a clock signal to couple the inverters together. The use of a single input clock signal along with the reduced number of transistors is achieved by proper selection of threshold voltages of the transistors.

REFERENCES:
patent: 3900747 (1975-08-01), Yamazaki et al.
patent: 3946255 (1976-03-01), Stein
patent: 4034238 (1977-07-01), Tayakin et al.
patent: 4035662 (1977-07-01), Kuo
patent: 4057741 (1977-11-01), Piquet

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