Single chip video system with separate clocks for memory control

Details Single chip video system with separate clocks for memory control Single chip video system with separate clocks for memory control

1984-07-23

1987-04-21

Gruber, Felix D.

Boots, shoes, and leggings

340798, 364200, G06F 314, G06F 1562

Patent

active

046601554

ABSTRACT:
A video system has a controller for controlling the transfer of data from a processor to a CRT monitor. The controller has two clocks and a CRT interface for synchronously interfacing the controller to the CRT monitor, a second interface for synchronously interfacing the controller to the processor. A first clock source provides timing for the CRT interface and is in synch with the timing of the CRT monitor. A second clock source provides timing for the processor interphase which is in synch with the timing of the processor.

REFERENCES:
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patent: 4237543 (1980-12-01), Nishio et al.
patent: 4286320 (1981-08-01), Ott
patent: 4495594 (1985-01-01), Eggebrecht et al.
patent: 4511965 (1985-04-01), Rajaram
patent: 4546450 (1985-10-01), Kanuma
patent: 4546451 (1985-10-01), Bruce

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