Single chip protocol engine and data formatter apparatus for...

Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing

Reexamination Certificate

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Details

C709S232000, C709S231000, C709S251000, C710S105000, C710S106000, C710S011000

Reexamination Certificate

active

06185620

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to an improved data processing system and in particular to an improved method and apparatus for transferring data from one data protocol to another data protocol. Still more particularly, the present invention provides an improved method and apparatus for transferring data from a channel protocol to a serial protocol, such as a Fibre channel.
2. Description of the Related Art
The Fibre Channel Standard (FCS) as adopted by ANSI provides a low cost, high speed interconnect standard for workstations, mass storage devices, printers, and displays. The Fibre Channel (FC) is ideal for distributed system architectures and image intensive local area networks and clusters. Fibre Channel is media independent and provides multi-vendor interoperability.
Current Fibre Channel data transfer rates exceeds 100 Mbytes per second in each direction. Fibre Channel data transfer rates also may be scaled to lower speed, such as 50 Mbytes per second and 25 Mbytes per second. This technology provides an interface that supports both channel and network connections for both switched and shared mediums. Fibre Channel simplifies device interconnections and reduces hardware cost because each device requires only a single Fibre Channel port for both channel and network interfaces. Network, port to port, and peripheral interfaces can be accessed though the same hardware connection with the transfer of data of any format.
In transferring data between targets and sources, the rapid increase in the performance of input/output (I/O) processor technology has caused a tremendous demand in high-performance server, workstation, clustered computing, and related storage markets for I/O solutions that are higher speed, offer more connectivity, and can connect over greater distances. Fibre Channel I/O processors that are high-performance, intelligent I/O processors designed to support mass storage and other protocols on a full-duplex Fibre Channel link are desired to move data in a manner that reduces the host CPU and PCI bandwidth required to support I/O operations. It is desirable to minimize the amount of time spent on a system bus, such as the PCI bus, for non-data-moving activities such as initialization, command and error recovery. Therefore, it would be advantageous to have an improved method and apparatus for transferring data between two different data protocols.
SUMMARY OF THE INVENTION
The present invention provides a method and apparatus for transferring data from a host to a first node through a bus connecting the host to the first node and subsequently to a second node connected to the first node through a fabric. The first node includes a chip architecture in which a protocol engine provides for on chip processing in transferring data such that frequent interrupts from various components within the chip may be processed without intervention from the host processor. Additionally, context managers are provided to transmit and receive data. The protocol engine creates a list of transmit activities, which is traversed by the context managers, which in turn execute the listed activity in a fashion independent from the protocol engine. In receiving data, the context managers provide a mechanism to process frames of data originating from various sources without requiring intervention from the protocol engine. When receiving data, the context managers are able to process frames from different sources, which arrive out of order. Additionally, the context managers also determine when all frames within a sequence have been received.
Additionally, the present invention provides a link control unit in which loop management is provided when the host is connected to a loop. Management of the loop includes implementing mechanisms to initiate acquisition of the loop and initiate a release of the loop in response to conditions in which data is received and transmitted by the host and by other nodes on the loop.


REFERENCES:
patent: 5519695 (1996-05-01), Purohit et al.
patent: 5598541 (1997-01-01), Malladi
patent: 5610745 (1997-03-01), Bennett
patent: 5623494 (1997-04-01), Rostoker et al.
patent: 5625563 (1997-04-01), Rostoker et al.
patent: 5638518 (1997-06-01), Malladi
patent: 5832279 (1998-11-01), Rostoker et al.
patent: 5944798 (1999-08-01), McCarty et al.

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