Boots – shoes – and leggings
Patent
1993-11-30
1996-11-12
Swann, Tod R.
Boots, shoes, and leggings
364DIG1, 364DIG2, 3642434, 36424341, 395445, 395450, G06F 1200, G06F 1300
Patent
active
055748830
ABSTRACT:
A multi-cache memory system resides on-chip with a system interface to external memory. A general cache memory holds frequently used data and OPCODES for delivery to a processor in one clock cycle. A microcode cache holds frequently used microcode instruction words for delivery to the processor in one clock cycle. Both general and microcode cache memories operate to replace less frequently used OPCODES, data words, and microcode instruction words, with more frequently used words.
REFERENCES:
patent: 4719568 (1988-01-01), Carrubba et al.
patent: 4761733 (1988-08-01), McCrocklin et al.
patent: 5150469 (1992-09-01), Jouppi
patent: 5185878 (1993-02-01), Baror et al.
patent: 5210842 (1993-05-01), Sood
patent: 5325499 (1994-06-01), Kummer et al.
patent: 5455925 (1995-10-01), Kitahara et al.
Kozak Alfred W.
Petersen Steven R.
Starr Mark T.
Swann Tod R.
Thai Tuan V.
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