Boots – shoes – and leggings
Patent
1981-07-30
1984-07-17
Gruber, Felix D.
Boots, shoes, and leggings
G06F 1300
Patent
active
044609728
ABSTRACT:
A microprocessor external instruction feature which provides for a single chip microprocessor with on-chip read only instruction store (ROS) that can also be operated with an off-chip instruction store. To accomplish this, the microprocessor instruction sequencing logic (instruction store, instruction register, instruction counter, and sequencing logic) is duplicated off-chip. An XI MODE input pin signal causes the microprocessor to take its instructions from the external instruction store via 12 XI input pins instead of from the on-chip ROS. A BR DECISION output pin signal from the microprocessor, which indicates that the branch conditions have been met, causes the external instruction counter to be loaded with a branch address from the external instruction register instead of being stepped by external sequencing logic. A WAIT output pin signal causes the external instruction feature logic to suspend operations while the microprocessor is in its wait state.
REFERENCES:
patent: 4087854 (1978-05-01), Kinoshita et al.
patent: 4093982 (1978-06-01), Heuer et al.
patent: 4153933 (1979-05-01), Blume et al.
PDP 11/45 Handbook, Digital Equipment Corporation, published 1975, Chapters 4 and 7.
Homan Merle E.
Machol Guenther K.
Warren Larry M.
Gruber Felix D.
International Business Machines - Corporation
Mills John G.
Schmid, Jr. Otto
LandOfFree
Single chip microcomputer selectively operable in response to in does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Single chip microcomputer selectively operable in response to in, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Single chip microcomputer selectively operable in response to in will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1494725