Single chip integrated address manager with address translating

Details Single chip integrated address manager with address translating Single chip integrated address manager with address translating

1993-08-04

1994-09-20

Dixon, Joseph L.

Boots, shoes, and leggings

364DIG1, 3642557, 3642564, G06F 1200

Patent

active

053496523

ABSTRACT:
An address manager, for use in a memory management system, translates a multiple-bit memory address received from a central processing unit and provides a translated memory address to a memory control unit. The address manager includes an address translation unit including a translation look-up table which translates the memory address to a translated address in accordance with translation parameters stored in the look-up table, and a translation unit control register which provides the address translation unit look-up table with the translation parameters. The address translation unit also includes an alert signal generator which provides the memory control unit with an alert signal when an address is being translated. The central processing unit, the address translation unit, the translation unit control register and the memory control unit are all integrated within a single integrated circuit.

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Mano, Computer System Architecture, 2nd ed., 1982, pp. 495-521.

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