Single bus architecture supporting subsystems of various critica

Details Single bus architecture supporting subsystems of various critica Single bus architecture supporting subsystems of various critica

1996-08-13

1998-11-24

Beausoliel, Jr., Robert W.

Electric lamp and discharge devices: systems

Pulsating or a.c. supply

Plural load device systems

31518501, 31518504, 31518507, 31518508, G06F 1114

Patent

active

058419691

ABSTRACT:
Communications systems architecture using a single shared resource bus to interconnect a plurality of subsystems each handling information having a first predetermined importance level and an error detect wrapper for encoding information to and from each such subsystem to detect errors in transmission along the shared resource bus. A heartbeat monitor is also provided for use in those subsystems handling information having a second predetermined level of importance to disable the subsystem if an error occurs within the subsystem.

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