Sine wave clock distribution with high voltage output

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307261, 307480, 328 13, 328 22, 328 63, 328 72, H03K 500, H03K 513, H03K 700, H03B 1900

Patent

active

052818616

ABSTRACT:
A clock signal is distributed over a circuit board and across a connector as a sine wave. A circuit located near the clocked circuitry converts the sine wave into a same frequency square wave for use by the clocked circuitry. The output stage of the converter circuitry provides a high output level to drive CMOS circuitry. The output transistor is pulled up to 5 volts, but the preceding transistors are pulled up to 6.3 volts so that the base to emitter drops are compensated.

REFERENCES:
patent: 4052676 (1977-10-01), Crittenden
patent: 4571012 (1986-02-01), Bassler et al.
patent: 4665372 (1987-05-01), Schwartz
patent: 4707665 (1987-11-01), Nugent et al.
patent: 4728815 (1988-03-01), Main
patent: 4755704 (1988-07-01), Flora et al.
patent: 4959557 (1990-09-01), Miller
Holt, "Electronic Circuits Digital and Analog", John Wiley & Sons, Inc., 1978, pp. 258-261 and 754-758.

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